Principal Product Engineer-18498

Synopsys•Sunnyvale, CA
•$187,700 - $281,500•Onsite

About The Position

Synopsys is hiring a Principal Product Engineer to lead silicon validation of non-volatile memory and one-time programmable (NVM/OTP) intellectual property and associated blocks, including analog circuits, power supplies, programming controllers, access ports/wrappers, and Built-In Self-Test (BIST) blocks. The role provides technical leadership in test planning, programming algorithm development, data analysis and modeling, test optimization, and failure analysis. The engineer will collaborate with cross-functional teams to complete Design Validation, Characterization, and Qualification testing and reporting for NVM/OTP IP products. The work includes defining test coverage, investigating functional and reliability issues, automating workflows, creating performance and reliability models, and coordinating qualification testing with external labs. This position is based in Sunnyvale, California and is not remote eligible.

Requirements

  • 15+ years of hands-on experience in semiconductor product/test engineering, with a strong background in NVM products.
  • Experience with data analysis tools such as Spotfire, Minitab, or JMP.
  • Knowledge of memory fault models and advanced test methodologies for defect detection and reliability analysis.
  • Experience with semiconductor test lab equipment, including memory ATE testers, automated handlers, oscilloscopes, waveform analyzers, and micro-probing stations.
  • Proficiency with scripting languages such as Python or Perl, and knowledge of memory pattern algorithm development for ATE MTO/ALPG hardware.
  • Excellent communication and documentation skills, including a track record of mentoring engineers and collaborating across engineering teams.
  • Experience optimizing test efficiency, performing semiconductor data analysis, and writing silicon test reports.
  • Strong analytical and problem-solving skills and a proactive approach to silicon debug and validation challenges.

Nice To Haves

  • A BS or MS in Electrical Engineering, Engineering Physics, Computer Science, or a related field; Electrical Engineering is preferred.
  • Experience with Credence Kalos 2 memory ATE testers.

Responsibilities

  • Lead silicon validation of NVM/OTP IP products through Design Validation, Characterization, and Qualification phases.
  • Define test coverage strategies for critical device functions and parameters, including robust DC and AC characterization and optimized guard-banding.
  • Investigate and resolve complex functional and reliability issues; oversee silicon performance analysis and root-cause failure analysis projects.
  • Develop scripts to automate workflows, perform statistical analysis and data visualization, build performance and reliability models, and generate test reports.
  • Drive improvements in test efficiency and quality, DOE methodology, data analysis, and cost reduction through AI, innovation, and automation.
  • Collaborate with external test and reliability labs on data collection and qualification testing, including HTOL/HTSL.
  • Mentor engineers and collaborate across engineering teams.

Benefits

  • Comprehensive health, wellness, and financial benefits.
  • The role may be eligible for an annual bonus, equity, and other discretionary bonuses.
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