Teradyne’s Silicon Technology Engineering team is seeking an experienced Principal High-Speed Board Designer to lead the design and development of advanced prototype and system-characterization hardware for next-generation ASIC platforms. The role supports the company’s strategy to own the end-to-end signal path from ASIC and package through interconnect and instrument. The designer will develop characterization and validation platforms that accelerate silicon bring-up, validate signal integrity, and reduce system-integration risk before production hardware is available. This is not a traditional PCB design role. It involves close collaboration with ASIC designers, package engineers, signal-integrity engineers, system architects, and instrument-development teams to co-design the complete signal-delivery path. The position is based in Agoura Hills, California. The base salary range is $197,800–$316,400, with base salary dependent on experience and skill set and potentially varying with demand and location. The role is eligible for discretionary bonuses based on financial performance. Teradyne offers health and well-being programs and other benefits, including medical, dental, vision, flexible spending accounts, retirement savings plans, life and disability insurance, paid vacation and holidays, and tuition assistance.
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Job Type
Full-time
Career Level
Principal