Principal Hardware Engineer - Networking

Microsoft•Redmond, WA
•$142,800 - $304,200

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) builds and operates infrastructure and foundational technologies supporting Microsoft’s cloud services. The Cloud Hardware Systems Engineering (CHSE) team works to improve the planning, quality, delivery, scale, and sustainability of Microsoft cloud hardware. The Principal Hardware Engineer will serve as a technical leader for complex network switch platforms supporting Microsoft Azure AI infrastructure. The role defines multi-generation platform strategy and drives execution from requirements and architecture through board design, system integration, validation, manufacturing, and deployment. It combines electrical engineering expertise and architectural judgment with cross-organization influence, supplier leadership, and the ability to translate infrastructure needs into scalable platform solutions.

Requirements

  • Master's degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field and 7+ years of technical engineering experience; or bachelor's degree in one of those fields and 8+ years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.

Nice To Haves

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field and 10+ years of technical engineering experience, or equivalent experience.
  • 10+ years designing and delivering board- or system-level hardware for networking, compute, storage, accelerator, or datacenter products across the hardware development lifecycle.
  • Experience leading architecture, requirements, design reviews, bring-up, validation, root-cause debugging, and production readiness for complex hardware platforms.
  • Experience developing high-speed serial and high-current power-delivery hardware and leading execution across electrical, firmware, mechanical, thermal, SI/PI, validation, manufacturing, and system-integration disciplines.
  • Experience providing technical leadership across internal organizations and external ODM/OEM, silicon, component, or manufacturing partners.
  • Ability to identify architectural and execution risks, frame system tradeoffs, and drive decisions across performance, reliability, cost, schedule, and long-term platform value.
  • Experience architecting merchant-silicon Ethernet switch platforms for AI, cloud, hyperscale, or datacenter infrastructure.
  • Deep experience with switch ASIC, CPU, BMC, CPLD/FPGA, clocking, reset, power-delivery, telemetry, and hardware-management architectures.
  • Experience with 112G/224G PAM4, high-speed connectors, cable backplanes, retimers, pluggable optical modules, and end-to-end channel-budget tradeoffs.
  • Experience with SONiC hardware enablement, platform APIs, firmware interfaces, and switch-platform management.
  • Ability to assess SI/PI analyses, PCB and package constraints, PDN behavior, power transients, thermal interactions, and laboratory correlation data.
  • Experience delivering hardware through architecture, EVT, DVT, PVT, production qualification, and high-volume manufacturing.
  • Experience defining supplier strategy, influencing technology roadmaps, and leading ODM/OEM execution across multiple concurrent programs.
  • Technical communication, specification writing, executive-level decision framing, mentoring, and cross-organization influence.

Responsibilities

  • Define and drive the multi-generation electrical and system architecture roadmap for custom network switch platforms, including technology insertion, platform reuse, risk retirement, and lifecycle strategy.
  • Own platform-level requirements decomposition and architectural tradeoffs across networking, racks, performance, reliability, availability, serviceability, security, telemetry, manufacturing, cost, and schedule.
  • Provide technical authority for switch ASICs, control-plane CPUs, BMCs, CPLD/FPGA, clocking, reset, power delivery, high-speed Ethernet, retimers, optical modules, cable backplanes, telemetry, and platform-management interfaces.
  • Lead architecture and design reviews covering schematics, PCB stack-up, signal integrity, power integrity, layout, BOM, component derating, DFT, DFM, DFR, and system integration; establish decision criteria and drive closure of cross-disciplinary issues.
  • Establish platform bring-up, electrical validation, margining, interoperability, stress, reliability, and production-test strategies, with evidence-based exit criteria and scalable test coverage.
  • Lead resolution of complex board-, system-, rack-, manufacturing-, and field-level issues by organizing cross-team debugging, developing data-based hypotheses, and driving verified corrective and preventive actions.
  • Provide technical direction to ODM/OEM and technology partners; define deliverables, design-review criteria, quality expectations, and escalation paths while influencing supplier roadmaps and execution.
  • Mentor senior engineers, raise engineering standards, and develop reusable specifications, design guides, validation methods, reference architectures, and lessons learned across network-switch programs.
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