Principal Design Engineer

Micron Technology • San Jose, CA

1d • $198,000 - $336,000 • Onsite

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are building the next generation of solid‑state drive controllers at Micron, where cutting‑edge ASIC design meets high‑performance storage innovation. Our team works across the full silicon lifecycle, partnering closely with verification, physical design, and system teams to bring complex designs to life. If you enjoy solving deep technical challenges and collaborating with experts across disciplines, this is an exciting place to make an impact! In this role, you will play a key part in delivering advanced ASIC designs from concept through production silicon. You will define micro‑architectures, develop RTL, and ensure designs meet performance, timing, and quality goals. This position offers strong ownership, collaboration, and the opportunity to leverage modern AI‑assisted tools to improve engineering efficiency and quality.

Requirements

• MS in Electrical Engineering or equivalent experience with 10+ years of ASIC design experience
• Strong expertise in Verilog/SystemVerilog for RTL and/or testbench development
• Deep understanding of digital ASIC design methodologies and full design flow
• Experience with industry-standard tools such as Design Compiler, PrimeTime, or similar
• Proven experience working on large-scale complex design projects

Nice To Haves

• Experience with AMBA AXI/AHB interconnect protocols
• Familiarity with storage or memory protocols such as NVMe, SCSI, CXL, or DDR
• Experience with verification and CAD tools such as ncsim or Formality
• Proficiency in Python or other programming languages for design automation
• Familiarity with AI/ML concepts and applying AI-enabled features in EDA tools for productivity improvements

Responsibilities

• Design, implement, and debug complex RTL logic and integrate IP into larger subsystems
• Support front-end design flow including lint, CDC, synthesis, and ECO activities
• Collaborate with SOC design, verification, STA, and physical design teams to deliver high-quality silicon
• Develop automation scripts to improve design efficiency and productivity
• Use AI-assisted tools to enhance debugging, documentation, and code quality

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal