Principal Design AI Engineer

Micron Technology • San Jose, CA

3d

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Design Engineer in the NVE Design Engineering organization at Micron Technology, Inc., you will drive the transformation of NAND circuit development through design automation, agentic circuit-design enablement, and environment transition! You will combine deep analog/core circuit expertise with software, methodology, and infrastructure leadership to accelerate design execution, improve quality and reproducibility, and reduce friction across global teams!

Requirements

• Master Degree (PhD preferred) in electrical engineering required.
• 8+ years of NAND design relevant proven experience required with proficient knowledge of Nand Flash memory read, program and erase algorithms
• Proficiency in analog/mixed signal circuit design (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgaps, IO buffers, RTL, Verilog)
• Proficient fundamentals in semiconductor and device physics and analog/mixed-signal circuit design.
• An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electro-migration (EM) and IR analysis.
• Proficiency in circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout.
• Proven proficiency in Python for engineering automation, including development of maintainable scripts, libraries, or frameworks that interface with EDA tools for simulation control, data extraction, regression management, or reporting.
• Proficient with Cadence design, LVS/DRC tools and UNIX
• Strong understanding of circuit design verification flows, including block‑level, subsystem‑level, and full‑chip simulations, corner management, PVT/mismatch analysis, and results qualification.
• analog and digital simulators such as HSPICE, Fast SPICE, and Verilog
• Strong debugging and problem‑solving skills, spanning circuit behavior, modeling issues, simulation convergence, tooling failures, and automation infrastructure.

Responsibilities

• Own and evolve the circuit design automation strategy for NAND analog/core development, defining a scalable roadmap for automation, agentic workflows, and design productivity improvements across projects.
• Develop and produce agentic enablement for circuit design, including AI/LLM-assisted flows that support such as environment setup and self-healing configuration, guided simulation and debug, intelligent corner planning and coverage closure, automated schematic/layout checks and review assistance, documentation synthesis and knowledge retrieval from internal sources.
• Create Python-based automation frameworks that integrate with EDA tools to accelerate batch and distributed corner execution, regression orchestration and result triage, waveforms/measurements extraction, QA metrics, and dashboards, automated signoff readiness reporting and audit trails.
• Architect and standardize methodologies for block/subsystem/full-chip verification (analog/mixed-signal), including reproducible run recipes, golden reference management, and regression gating criteria.
• Serve as a technical authority across analog/core teams, solving sophisticated technical problems at the intersection of circuit behavior, modeling, simulation methodology, and automation reliability.
• Define and enforce quality practices for automation work you're doing (testing, CI/CD where applicable, coding standards, version control, release notes), ensuring tools are maintainable, traceable, and safe to deploy broadly.
• Integrate automation with project execution, partnering with circuit designers, firmware, validation, and architecture teams to align tooling with breakthrough needs and deliver measurable cycle-time reduction.
• Develop and curate technical documentation for environments, methodologies, and automation tooling—reducing tribal knowledge and improving onboarding and cross-team consistency.

Benefits

• choice of medical, dental and vision plans
• benefit programs that help protect your income if you are unable to work due to illness or injury
• paid family leave
• robust paid time-off program
• paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal