Principal Design Engineer

Cadence Design Systems•San Jose, CA
•$140,000 - $260,000

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

Requirements

  • BS in Electrical Engineering with a minimum of 7 years of experience OR MS with a minimum of 5 years of experience OR PhD with a minimum 1 year of experience
  • Experience with Cadence tools such as Innovus, Tempus, QRC, Voltus and Pegasus
  • Experience with advanced technologies like 5nm, 3ns and 2nm nodes
  • Experience using Linux servers, Script development using Shell/Perl/TCL
  • Detailed knowledge about industry standard interfaces such as PCI Express, DDR, LPDDR, SRAM, UCIe, etc.

Responsibilities

  • Lead a team to implement SOCs or sub system chips
  • Work on RTL synthesis and floor planning
  • Build clock trees and perform optimizations
  • Close timing, IR drop and physical verification
  • Review and Document designs for taping out
  • Interface with Front End RTL design teams and Back End verification teams

Benefits

  • paid vacation
  • paid holidays
  • 401(k) plan with employer match
  • employee stock purchase plan
  • a variety of medical, dental and vision plan options
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