Principal AI & Secure Platform Architect

Cirrus Logic•Austin, TX

About The Position

Cirrus Logic Venture Labs is seeking a Principal AI & Secure Platform Architect to develop software infrastructure and developer ecosystems for advanced semiconductor platforms and emerging intelligent edge computing solutions. The role bridges silicon architecture, compiler technology, AI-driven development tools, and secure cloud infrastructure, enabling integration and deployment of complex workloads and secure collaboration among customers, technology partners, and third-party software providers. The architect will build secure, scalable, multi-tenant development environments and manage the software lifecycle from development through deployment on silicon, protecting proprietary software, algorithms, models, and intellectual property. This is a hands-on, foundational role on a small team, with significant autonomy and ownership to develop new capabilities from the ground up. The position covers unified compiler and deployment frameworks for embedded firmware, DSP algorithms, ML models, and FPGA RTL; AI-agent-driven development and toolchain automation; and a cloud-native platform with secure software lifecycle management. The architect will partner across silicon, ML, DSP, embedded software, and security disciplines, make architectural decisions, prototype solutions, and establish the technical foundation for a third-party developer ecosystem. Success means bringing diverse technologies together into intuitive, secure, efficient workflows that improve developer productivity and streamline the path from concept to deployment.

Requirements

  • Master's or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent technical expertise.
  • 10+ years of relevant experience in compiler development, embedded systems, heterogeneous computing, or developer platforms.
  • Deep knowledge of compiler design, code generation, optimization, runtime systems, and processor microarchitecture.
  • Hands-on experience with LLVM, MLIR, GCC, or comparable compiler infrastructure.
  • Strong experience with ARM embedded development and exposure to DSP programming, ML inference deployment, accelerator mapping, and FPGA development flows.
  • Experience architecting cloud-native developer platforms, multi-tenant infrastructure, secure build environments, CI/CD pipelines, and software supply-chain security.
  • Understanding of secure software development practices, workload isolation, cryptographic signing, software provenance, trusted execution, secure deployment, and protection of third-party intellectual property.
  • Demonstrated experience applying LLMs, AI agents, and automated engineering workflows to software development, compilation, testing, or complex toolchain orchestration.
  • Strong proficiency in C/C++, Python, APIs, SDKs, build systems, and distributed development infrastructure.
  • Proven ability to architect and deliver complex cross-disciplinary systems, operate independently, and influence decisions spanning silicon, software, security, and customer experience.
  • Candidates must be able to access technical data without requiring an export license; Cirrus Logic is unable to sponsor or obtain export licenses for this role.

Nice To Haves

  • Experience developing compilers, runtimes, or programming environments for NPUs, AI accelerators, DSPs, GPUs, or custom processor architectures.
  • Familiarity with ML compilation and deployment frameworks such as TVM, IREE, ONNX, TensorFlow Lite, or PyTorch.
  • Experience with FPGA synthesis, hardware/software co-simulation, virtual platforms, and performance modeling.
  • Experience designing secure multi-party development platforms, confidential computing environments, hardware roots of trust, or protected IP distribution ecosystems.
  • Background in semiconductor startups, emerging compute architectures, developer ecosystems, or early-stage technology incubation.

Responsibilities

  • Architect a unified compilation and deployment framework for embedded firmware, DSP algorithms, ML models, and FPGA RTL configurations.
  • Develop and integrate compiler frontends, intermediate representations, optimization passes, backends, and runtime frameworks for heterogeneous compute resources.
  • Collaborate with silicon architects on instruction sets, custom operators, accelerator interfaces, memory architecture, workload partitioning, and system-level power, performance, and area.
  • Establish shared abstractions for execution, interoperability, and data movement across CPUs, DSP engines, ML accelerators, and configurable logic.
  • Build an AI-agent-driven development platform that turns natural-language application intent into compiled, validated, deployable hardware/software pipelines.
  • Use LLMs and agentic workflows to automate code generation, workload partitioning, compiler optimization, build orchestration, simulation, testing, and debugging.
  • Integrate heterogeneous programming environments into a unified toolchain, from application and model development to executable binaries and programmable-logic configurations.
  • Establish reproducible, deterministic build and validation processes, using AI to accelerate development and optimization.
  • Integrate compilation, simulation, debugging, profiling, and validation into an AI-orchestrated development workflow.
  • Architect and own a secure, cloud-native, multi-tenant development environment for collaboration among Cirrus, third-party software IP providers, and customers.
  • Establish an end-to-end secure software development lifecycle covering IP onboarding, development, compilation, integration, simulation, validation, artifact signing, secure distribution, deployment, and lifecycle updates.
  • Design tenant isolation, identity and access controls, encryption, secrets management, and protected build and execution environments to safeguard proprietary source code, ML models, and algorithms.
  • Establish software provenance, integrity verification, secure boot and provisioning interfaces, and chain-of-trust mechanisms from cloud development infrastructure to execution on silicon.
  • Enable controlled cross-vendor collaboration, debugging, profiling, and system-level simulation while maintaining confidentiality, access restrictions, and auditable software supply chains.
  • Partner with SoC architects, ML engineers, DSP specialists, embedded software teams, and security experts to shape hardware/software platform architecture.
  • Evaluate and integrate open-source and commercial compiler frameworks, AI development technologies, simulation platforms, and secure cloud infrastructure.
  • Drive architectural decisions, develop working prototypes, and establish the technical foundation for a scalable third-party developer ecosystem.
  • Operate autonomously in an early-stage innovation environment, balancing architectural vision with rapid experimentation and execution.
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