Photonics Layout Engineer (Remote)

Voyant Photonics•New York, NY
•$120,000 - $190,000•Onsite

About The Position

Voyant Photonics is hiring a Photonics Layout Engineer to develop silicon photonic integrated circuit (PIC) layouts for optical circuit switching in AI data centers and chip-scale FMCW LiDAR for robotics and autonomy. The role owns PIC layouts from initial floorplanning through tapeout, working on dense waveguide routing, multilayer photonic layouts, and die- and reticle-level floorplanning for chips integrating hundreds to thousands of optical components. The position also involves developing automated layout methodologies and collaborating with photonic designers and other engineering teams in a fast-paced startup environment. The work is primarily in person at Voyant’s Midtown Manhattan lab and office, despite the remote designation in the job title. Voyant describes a high-trust, high-accountability environment with flexible scheduling rather than a rigid 9-to-5. Because the company works with customers across time zones, some calls may start early or run late, with schedules adjusted accordingly. The company provides catered lunch daily at headquarters.

Requirements

  • B.S. or M.S. in Electrical Engineering, Photonics, Physics, Optical Engineering, or a related field.
  • At least 2 years of experience in photonic integrated circuit layout, preferably in silicon photonics or a similar platform.
  • Proficiency with photonic layout tools such as GDSFactory, IPKISS, KLayout, or equivalent.
  • Strong Python scripting skills, including experience with layout automation or parameterized designs.
  • Experience with photonic waveguide routing, component placement, and chip-level layout integration.
  • Familiarity with silicon photonics foundry PDKs, design rules, and tapeout processes.
  • Strong attention to detail, problem-solving skills, and ability to collaborate in a multidisciplinary team.

Nice To Haves

  • Experience with large-scale PIC layout, optical switching networks, or complex photonic routing architectures.
  • Experience with multilayer silicon/silicon nitride photonic platforms and interlayer optical transitions.
  • Experience developing automated routing, placement optimization, or layout generation algorithms.
  • Familiarity with Cadence Virtuoso, SKILL, or electrical layout and EDA integration.
  • Experience with photonic-electronic co-layout, packaging interfaces, or commercial silicon photonics foundry tapeouts.

Responsibilities

  • Develop and implement layouts for photonic integrated circuits, from component-level test structures to large-scale system PICs.
  • Translate photonic schematics and design requirements into efficient, manufacturable GDSII layouts.
  • Implement dense waveguide routing, multilayer optical interconnects, and die- and reticle-level floorplanning.
  • Develop and maintain parameterized photonic component cells (PCells) and reusable layout libraries.
  • Create Python-based scripts and automation tools for layout generation, routing, and design verification.
  • Integrate photonic and electrical layouts, including electrical routing, contact pads, and packaging interfaces.
  • Perform and debug physical verification, including DRC, LVS, and optical connectivity checks.
  • Collaborate with photonic designers, packaging engineers, and foundry partners to optimize layouts and support tapeout submissions.

Benefits

  • Catered lunch every day at headquarters.
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