Photonic IC Design Engineer, Chip-to-System Integration

K2 Space•Seattle, WA

20h•$130,000 - $200,000

About The Position

K2 is hiring a Photonic IC Design Engineer focused on chip-to-system integration. The engineer will design photonic integrated circuits and their packages, making them small, lightweight, low-cost, and rugged enough for satellite constellation use. The role owns the optical and electrical interfaces between the photonic chip and the broader system, including optical coupling and fiber attachment, high-speed modulators and RF interfaces, and bias and tuning control. The engineer will help ensure assemblies survive launch and years in orbit, while providing coupling-loss, modulator, and bandwidth data that feed into system link budgets. The position works closely with K2's systems, photonics test and automation, RF, ASIC, and manufacturing teams, as well as external foundry and packaging partners. As a founding member of K2's photonics team, the engineer will help establish how the company designs, packages, and qualifies photonic hardware. The role includes device and package design, test and qualification planning, characterization, and design reviews.

Requirements

PhD or MS in electrical engineering, optics, physics, or a related field, or a bachelor's degree with equivalent experience.
PIC designs taken through tapeout on one or more commercial integrated photonics platforms, such as silicon photonics, silicon nitride, indium phosphide, or thin-film lithium niobate, with fabricated devices characterized in a lab.
Hands-on experience at the chip boundary, through optical I/O design with fiber attach or packaging, or high-speed modulator and RF design measured with a VNA, including S-parameters and electro-optic bandwidth.
Experience with photonic device simulation tools such as Meep, Tidy3D, Lumerical FDTD, FEM, or EME; layout tools such as KLayout, gdsfactory, or Cadence; and Python for automation and data analysis.

Nice To Haves

3D mechanical CAD experience, such as SolidWorks, Inventor, or Fusion, for package parts or fixtures, including drawings suitable for machine-shop fabrication.
Radiation, thermal-vacuum, or vibration testing of photonic or electronic devices.
Inverse design or topology optimization of couplers and other optical I/O devices.
RF package or board design to tens of GHz using tools such as HFSS or Sonnet.
Heterogeneous or 3D integration and co-packaged optics experience.
Experience building hardware for space or other harsh environments.
Modulator bias control, resonator locking, or other closed-loop control of photonic devices.
A background in RF or microwave engineering.

Responsibilities

Design, simulate, and lay out PIC devices and circuits—including edge and grating couplers, spot-size converters, photodetectors, and passive components—from specification through tapeout on commercial integrated photonics foundry platforms.
Design high-speed modulators, including traveling-wave Mach-Zehnder and ring modulators, their electrodes, terminations, and RF launches; co-design them with RF and ASIC engineers to meet driver and TIA specifications.
Implement bias and tuning control in hardware, including heater and monitor-photodiode placement and drive and readout interfaces; bring up closed-loop modulator bias and resonator locking and verify operation over temperature and radiation.
Set optical I/O requirements, including coupling loss, alignment tolerance, polarization, and die I/O placement, and incorporate them into chip floorplans and system link budgets.
Design package mechanical components in 3D CAD, including PIC carriers and submounts, fiber-array V-grooves and lid geometry, strain relief, and alignment and assembly fixtures; tie tolerance stack-ups to the coupling-loss budget.
Plan and drive radiation, thermal-vacuum, and vibration qualification of photonic devices and packages; lead test campaigns with internal reliability engineers and external test facilities and turn results into design rules.
Partner with photonics test and automation teams on characterization by defining test plans and pass/fail metrics, designing test structures and probe- and fiber-array-compatible layouts, helping bring up and validate automated measurements, and using shared data to connect simulation, measurement, and design.
Carry the high-speed electrical path through the package, including wirebond or flip-chip transitions and RF interconnects to drive electronics.
Present designs at preliminary and critical design reviews.