About The Position

Kilby Labs is seeking a highly motivated and experienced Silicon Photonics Design Engineer to design silicon photonics solutions for advanced data communications applications and establish methodologies, tools, and automation flows for silicon photonics design. In this role, you will be responsible for the end-to-end design and layout of transmit and receive Photonic Integrated Circuits (PICs). You will play a critical role in helping to build up an internal design enablement toolset including PDK and verification flows. The role includes working closely with process development, system architecture, validation, and product and test engineering team members to ensure successful prototyping, product development, and launch. The role requires a creative problem-solver who can develop unique, breakthrough technologies that leap-frog the state-of-the-art and contribute across various aspects of a project depending on project needs.

Requirements

  • Master’s or PhD degree in Electrical Engineering, Physics, Applied Physics, Photonics, Optical Communications or related field.
  • 3+ years of industry experience working with and developing Si photonics PDKs and photonics design automation for data communication or telecommunication applications
  • Experience with high-speed modulator and detector design and/or passive photonic component design and photonic integrated circuit design
  • Experience with photonics component, RF, and circuit design tools such as COMSOL, Lumerical, PhotonDesign, Optiwave, HFSS.
  • Multiple successful tape-outs at leading foundries (e.g., TSMC, GlobalFoundries, Tower, or Intel) with demonstrated correlation between simulation and measured silicon data.
  • Strong understanding of PIC circuit design and layout, experience contributing to or leading PIC tapeouts.
  • Proficiency with Cadence Virtuoso, as well as other photonic design enablement tools such as Synopsys, Luceda, GDSFactory.
  • Ability to work both independently and as part of a team.

Nice To Haves

  • EPDA Expertise: Experience with Electronic-Photonic Design Automation (EPDA) flows, co-simulating photonic circuits with CMOS driver/TIA circuits in a unified environment.
  • Experience using Python-based layout frameworks to automate complex photonic routing.
  • Experience with JMP Design for Manufacturing (DFM): Managing density requirements, metal fill, and waveguide smoothing to minimize scattering loss.
  • Experience with silicon photonics fab processing
  • Experience with hands-on silicon photonics volume test and wafer-level test automation
  • Optical Proximity Correction (OPC): Understanding how layout geometry affects lithography at the foundry level.
  • Experience with technical approaches for next-gen (beyond 200 Gb/s/lane) silicon photonics including non-silicon materials
  • Understanding of the end applications related optical networking, including pluggable modules and co-packaged optics.
  • Strong verbal and written communication skills.
  • Ideal candidate must also excel at promoting new ideas, building collaborative relationships, working across organizations.

Responsibilities

  • PIC Design - Design of passive and active PIC components such as advanced passive waveguide circuit elements, and high speed active components such as modulators and Ge-based waveguide detectors.
  • Layout and tape-out execution - Translating schematic level layouts to .gds files and development of PCells, including both hands-on layout and working with remote layout engineering teams.
  • Design Enablement and PDK development – Assist with Building and maintaining a Process Design Kit and schematic-driven layout automation including development of design rules and design rule checking.
  • Layout Verification – Development of DRC and LVS checks for layout verification to ensure first-pass silicon success
  • Design for manufacturability – Collaborate with design, systems, architecture and packaging teams to ensure designs meet specifications with high yield. Link design rules to process capabilities and test yield data.
  • Design for test – Ensure designs include advanced DFT features including strategies and architectures enabling wafer-level and die-level volume testing. Develop and implement volume-product-ready solutions that are power- and cost-efficient, contributing to the development of the launch of datacom transceiver products. Ensure component models and design rules correlate to volume test data by closing the loop between manufacturing test data and design simulations using tools such as JMP.
  • Develop PICs based on both external fixed and custom Si fabrication processes, working closely with process teams. See designs through to mass production by collaborating with product engineering and operations teams.
  • Participate in R&D to develop next generation photonics technologies, drive IP development. Present work and findings to internal and external stakeholders.
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