This role involves designing and taping out silicon photonic integrated circuits (PICs), including integrated coherent receivers and transmitters. The engineer will be responsible for preparing PIC layouts using industry-standard design flows, implementing parametric layout cells, and developing/simulating passive and active photonic devices. The position requires performing various electromagnetic, optical, and electrical simulations, supporting the development of photonic components for multiple foundries, and collaborating closely with external foundries for successful PIC design and tapeout. It also involves conducting design corner analysis, post-layout simulations, developing compact models for system-level verification, and working with interdisciplinary teams across product development phases, from New Product Introduction (NPI) to high-volume manufacturing. The role includes participation in design reviews, documentation, technical presentations, and mentoring junior engineers.
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Job Type
Full-time
Career Level
Senior
Number of Employees
5,001-10,000 employees