Mixed Signal SVE Engineer

Qualcomm • San Diego, CA

4d • $145,600 - $218,400

About The Position

Qualcomm Technologies, Inc. is seeking a Mixed Signal SVE Engineer for its Engineering Group, ASICs Engineering organization. The engineer will support silicon bring-up and validation of mixed-signal IPs, including DDR PHY and SerDes. The role involves working closely with PHY Design, Firmware, PTE, and Software teams to bring up PHYs and debug complex issues.

The position also includes developing firmware, executing regression tests, generating detailed test reports and documentation, and supporting customer issues related to PHYs after product release. Qualcomm describes itself as a fabless semiconductor company and a developer of wireless ICs.

Requirements

• Bachelor's degree in Science, Engineering, or a related field and 4+ years of ASIC design, verification, validation, integration, or related work experience; OR a master's degree in one of these fields and 3+ years of related experience; OR a PhD in one of these fields and 2+ years of related experience.

Nice To Haves

• Hands-on experience with DDR/SerDes test development, debugging, and characterization.
• Proficiency in firmware development and scripting, preferably Python.
• Solid understanding of JEDEC and other electrical/protocol specifications.
• Strong understanding of PHY circuit fundamentals, including DLLs, I/O, and calibration.
• Familiarity with signal integrity and probing techniques for memory buses.
• Skill in using lab instruments such as oscilloscopes, spectrum analyzers, and logic analyzers.
• Detail-oriented approach with a focus on quality and ownership of deliverables.
• Excellent verbal and written communication skills.
• Experience with hands-on lab work, including soldering and system instrumentation.
• Experience applying machine learning or data science techniques to hardware validation or silicon debug.
• Knowledge of statistical modeling and data visualization for large-scale silicon test datasets.
• Ability to build and maintain automated pipelines for data collection, labeling, and model training.
• Understanding of how AI can enhance lab instrumentation workflows and regression analysis.

Responsibilities

• Lead bring-up, debugging, and optimization of DDR/SerDes PHYs across post-silicon teams.
• Proactively identify and resolve issues to support successful product launches.
• Provide post-release support for PHY-related customer issues.
• Develop firmware and execute regression testing.
• Generate clear and detailed test reports and documentation.
• Work with PHY Design, Firmware, PTE, and Software teams on PHY bring-up and debugging.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants, except for employees on sales-incentive plans.
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level