Mask Layout Designer

QualcommSan Diego, CA

About The Position

Qualcomm Technologies, Inc. is seeking an experienced Mask Layout Designer to fulfill both block and project lead level roles within the QCT WAN RFIC design group. This role involves working in a very large team environment and responsibilities will vary depending on experience and expertise. The layout designer will be responsible for the physical design of RF and analog circuits in a fast-paced environment. This includes detailed custom layout, floorplan, placement, routing, verification, and release of the final database for high frequency RF circuits. The role also requires providing accurate schedules and plans to meet project milestones, debugging complex verification errors, mentoring junior layout designers, and potentially leading a team to deliver high-quality layout that meets design requirements. Understanding of hierarchical planning and integration, and chip design from top-down and bottom-up through tapeout is essential. Additionally, the role involves developing and maintaining automation scripts (e.g., SKILL, Python, and Perl) to improve layout efficiency, verification/debug workflows, and data checks.

Requirements

  • Associate degree / Certificate with experience and/or education in RF high frequency circuit custom layout at chip, block, and device levels
  • Basic automation scripting (SKILL, Python, and/or Perl) for layout/verification flows
  • Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 2+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
  • Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
  • High School diploma or equivalent and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
  • 2+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap)

Nice To Haves

  • Bachelor's degree with at least one to two year of experience in Custom layout high frequency RF circuits, at chip, block, and device levels including LNA, mixer, opamp, bias, LDO, VCO, etc…
  • Cadence Virtuoso XL
  • Siemens Caliber DRC/ERC/LVS verification and debugging tools
  • Automation scripting using SKILL, Python, and Perl (development, debug, and maintenance)
  • Practical use of AI-assisted tools (e.g., coding assistants) to accelerate scripting, analysis, and documentation while following company security and IP guidelines

Responsibilities

  • Physical design of RF and analog circuits
  • Detailed custom layout including floorplan, placement, routing, verification, and release of final database for high frequency RF circuits
  • Provide an accurate schedule and plan to meet project milestones
  • Debug complex verification errors
  • Mentor junior layout designers
  • Lead a team to deliver high quality layout that meets design requirements
  • Understanding of hierarchical planning and integration, chip design from top down and bottom up through tapeout
  • Develop and maintain automation scripts (e.g., SKILL, Python, and Perl) to improve layout efficiency, verification/debug workflows, and data checks

Benefits

  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Highly competitive benefits package designed to support your success at work, at home, and at play
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