Leader, Hardware Engineering
About The Position
The Leader, Hardware Engineering is a key member of Cisco’s Purpose Built Switch hardware team, which develops next-generation hyperscaler switch hardware based on Silicon One and/or merchant ASICs. The role leads a team of engineers responsible for system- and board-level specifications, schematic capture, FPGA design, ASIC and system bring-up, and troubleshooting. The team works with ASIC, DFT, Signal Integrity, software, diagnostics, and manufacturing groups to resolve design issues and bring systems up successfully. The leader drives large and complex projects from requirements through execution and completion, develops plans for effective resource and financial/material management—including support for Cisco net zero standards—and serves as a technical liaison to major product component suppliers. The position is onsite in San Jose, California.
Requirements
- Bachelor’s degree and 15 years of related experience, or a master’s degree and 12 years of related experience, or a PhD and 8 years of related experience.
- At least 4 years of supervisory experience.
- Experience with complex high-speed board design and board bring-up.
- Experience with schematics/layout, hardware bring-up, troubleshooting, and system-level testing.
- Experience managing teams and leading technical projects.
Nice To Haves
- Experience working with software teams on system bring-up and porting, and device configuration.
- Prior experience with common hardware technologies, including power, clock, memory, CPU, and a variety of system interfaces.
- Experience with schematics, PCB, and Verilog HDL/VHDL design.
- Experience writing scripts in Python, Tcl, or similar languages.
- Experience with lab bring-up and product design validation.
- Knowledge of the Ethernet protocol.
- Experience with access-switch Ethernet interfaces: gigabit, multi-gigabit, and 10 gigabit.
- Experience with high-speed Ethernet interfaces: 25G, 100G, 400G, and 800G.
- Experience with DRAM, CPU subcomplex, and control interfaces such as PCIe, I2C, SPI, and MDC/MDIO.
Responsibilities
- Define and design next-generation hyperscaler switch hardware based on Silicon One and/or merchant ASICs.
- Lead a team of engineers responsible for system- and board-level specifications, schematic capture, FPGA design, ASIC/system bring-up, and troubleshooting.
- Coordinate with ASIC, DFT, Signal Integrity, software, diagnostics, and manufacturing teams to resolve design issues and bring up systems.
- Lead large and/or complex projects from requirements through execution and completion.
- Develop action plans for optimal resource utilization and management of financial and material resources, including supporting Cisco net zero standards.
- Act as technical liaison with major component suppliers for the product.
Benefits
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) plan with Cisco matching contribution
- Paid parental leave
- Short- and long-term disability coverage
- Basic life insurance
- Paid holidays
- Floating holiday for non-exempt employees
- Paid day off for employee’s birthday
- Paid year-end holiday shutdown
- Paid personal wellness days
- Paid vacation or flexible vacation time off, depending on employee classification
- Sick time off
- Additional paid time away may be requested for critical or emergency family issues
- Optional paid volunteer days
- Annual bonuses for eligible non-sales roles
- Potential grants of Cisco restricted stock units
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What This Job Offers
Job Type
Full-time
Career Level
Senior
