Hardware Engineering Technical Leader
About The Position
The Hardware Engineering Technical Leader is a key member of Cisco’s Purpose Built Switch hardware team. The role defines and designs next-generation hyperscaler switch hardware based on Silicon One and/or merchant ASICs, and is responsible for system- and board-level specifications, schematic capture, FPGA design, and ASIC/system-level bring-up and troubleshooting. The role works with ASIC, DFT, signal integrity, software, diagnostics, and manufacturing groups to bring up systems and resolve design issues; debugs and troubleshoots in labs using scopes and analyzers; and acts as a technical liaison with major component suppliers. The position is part of Cisco’s Common Hardware Group, which develops hardware platforms for switching, routing, and wireless products, with product development spanning design, qualification, and production.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or Telecommunications and 8+ years of experience; or a master’s degree in one of these fields and 6+ years of experience; or a PhD in Electrical Engineering or Computer Engineering and 3 years in system-level development.
- Prior experience with common hardware technologies, including power, clock, memory, CPU, and a variety of system interfaces.
- Previous experience with complex high-speed board design and board bring-up.
- Experience with schematics/layout, hardware bring-up, troubleshooting, and system-level testing.
- Experience working with software teams on system bring-up and porting, including device configuration at the register level.
Nice To Haves
- Experience with schematics, PCB, and Verilog HDL/VHDL design.
- Experience writing scripts such as Python or Tcl.
- Experience with lab bring-up and product design validation.
- Knowledge of the Ethernet protocol.
- Experience with access-switch Ethernet interfaces, including gigabit, multi-gigabit, and 10-gigabit.
- Experience with high-speed Ethernet interfaces: 25G, 100G, 400G, and 800G.
- Experience with DRAM, CPU subcomplexes, and control interfaces such as PCIe, I2C, SPI, and MDC/MDIO.
- Self-motivation, teamwork, and strong communication skills.
Responsibilities
- Define and design next-generation hyperscaler switch hardware based on Silicon One and/or merchant ASICs.
- Develop system- and board-level specifications, capture schematics, and contribute to FPGA design.
- Perform ASIC- and system-level bring-up and troubleshooting.
- Coordinate with ASIC, DFT, signal integrity, software, diagnostics, and manufacturing teams to bring up systems and resolve design issues.
- Debug and troubleshoot hardware in labs using scopes and analyzers.
- Act as the technical liaison with major component suppliers.
Benefits
- Medical, dental, and vision insurance, subject to plan eligibility rules.
- 401(k) plan with Cisco matching contribution.
- Paid parental leave.
- Short- and long-term disability coverage.
- Basic life insurance.
- Paid holidays and a floating holiday for non-exempt employees.
- Paid birthday day off, year-end holiday shutdown, and paid personal wellness days.
- Paid vacation time for non-exempt employees; exempt employees participate in a flexible vacation time-off program.
- Paid sick time, with carryover of unused sick time subject to the stated limit.
- Additional paid time away may be requested for critical or emergency issues for family members.
- Optional paid volunteer days.
- Annual bonuses for eligible non-sales employees, subject to Cisco policies.
- Potential Cisco restricted stock unit grants, subject to continued employment and vesting terms.
- Illinois employees participate in a unique time-off program to meet local requirements.
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Senior
