Lead SoC Performance Architect
About The Position
As a SoC Performance Architect, you will create performance and power models for fabric NoC, DRAM controller, and IO blocks for server-class SoCs. You will correlate models against RTL behavior, prototype ideas, and help productize performance and power features for future SoC designs. The position is open in Santa Clara, San Diego, and Austin, with compensation adjusted according to location. The role involves RTL performance verification, development and validation of SoC performance and power models, investigation of performance issues, and collaboration with architects and RTL developers to bring improvements into products.
Requirements
- 8+ years of experience in SoC performance and power modeling.
- Strong grasp of computer architecture fundamentals, especially interconnects, traffic QoS, distributed caches, coherency flows, DRAM controller flows, and IO (PCIe) flows.
- Proficiency in C++ and Perl or Python.
- Exposure to performance analysis and debugging.
- Ability to independently identify, troubleshoot, and solve performance problems.
- Bachelor's degree in Electrical Engineering, Computer Science, or a related field and 8+ years of Systems Engineering or related work experience; or a master's degree in one of those fields and 7+ years of related work experience; or a PhD in one of those fields and 6+ years of related work experience.
- 2+ years of experience in one or more system architecture technology areas and products, such as Power System, Shared Resource Management, Limits/Thermal Management, or Hardware Islands.
Nice To Haves
- 10+ years of experience in CPU or SoC performance and power modeling, or Performance Validation.
- Proficiency in IP/SoC-level performance validation between RTL and performance models.
- Expertise in analyzing and debugging performance shortfalls in an RTL environment.
- Exposure to testing and debugging performance issues in post-silicon environments.
- Demonstrable experience productizing features that improve a design's performance or power characteristics.
Responsibilities
- Conduct RTL performance verification, including creating verification plans, directed tests, and checkers.
- Develop SoC performance and power models for blocks such as interconnect NoCs, distributed system caches, memory controllers, and IO controllers.
- Verify model correctness by writing unit tests and debugging mismatches against expectations.
- Identify ideas to improve SoC performance and power characteristics, prototype them in performance and power models, and thoroughly characterize them.
- Work with architects and RTL developers to productize improvements identified through detailed studies.
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants; employees on sales-incentive plans are not eligible for the annual bonus.
- Competitive benefits package designed to support success at work, at home, and at play.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
