Lead Member of Technical Staff (LMTS) – Logic Design
About The Position
Rambus is hiring a Lead Member of Technical Staff – Logic Design to join its Silicon IP team in Hillsboro, Oregon. Reporting to the Director of Engineering as an individual contributor, this role focuses on the micro-architecture and design of next-generation, high-performance memory controllers for data centers and AI applications. The position offers opportunities to contribute to innovation in a fast-growing market serving tier-one customers. The role uses a hybrid work approach. Employees are encouraged to work onsite an average of at least three days per week, with up to two days of remote work. Rambus offers a competitive compensation package that includes base salary, bonus, equity, and employee benefits. The company describes its commitment to inclusion, equal employment opportunity, and reasonable accommodations for qualified applicants with disabilities and disabled veterans.
Requirements
- Strong SystemVerilog/Verilog RTL design expertise.
- Experience with Questa, Incisive, or VCS simulators.
- Experience with Python, Perl, or Tcl scripting.
- Ability to learn quickly and work independently.
- Solid communication and project management skills.
- At least 8 years of ASIC/FPGA logic design experience with a BS in Electrical Engineering, or at least 6 years of ASIC/FPGA logic design experience with an MSEE.
Nice To Haves
- ASIC synthesis experience.
- Timing constraints experience.
- CDC/RDC experience.
- UVM verification experience.
- Expertise in HBM or LPDDR memory.
- AMBA AXI or CHI design experience.
Responsibilities
- Own micro-architecture definition and RTL design for critical blocks, including schedulers, command pipelines, coherency and ordering logic, and system interfaces.
- Analyze performance, power, and area trade-offs and make design decisions based on quantitative data.
- Collaborate with the verification team to shape test plans and improve verification coverage.
- Work with the physical design team to understand and resolve timing, power, and congestion challenges.
- Work with the verification team to debug regression failures, identify root causes, and provide RTL fixes when necessary.
- Provide technical support to the FAE team for pre-sales customer engagements.
- Provide technical support to the AE team for post-sales customer deliveries.
Benefits
- Competitive compensation package including base salary, bonus, equity, and employee benefits.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
