Lead Application Engineer

Advantest•San Jose, CA

18h

About The Position

We are seeking a highly experienced Lead Application Engineer to join Advantest’s Research & Ventures (R&V) team, developing and delivering advanced semiconductor test solutions on the Advantest V93000 Test Platform, with a strong focus on wafer-level (die-level) testing, thermal management, and high-performance digital devices. As part of the R&V team, you will have the opportunity to work on new and cutting-edge technologies and play a critical role in incubating, enabling, and bringing new products and capabilities to our customers. You will be a key technical contributor, working closely with R&D, cross-functional teams and customers to transform early concepts and advanced technologies into robust, scalable test solutions. You will independently design, implement, debug, and optimize test programs for silicon devices at the wafer level, while managing the thermal and electrical challenges. The ideal candidate is a self-starter with strong SmarTest8 expertise, hands-on experience with die-level probers, and a passion for innovation—capable of leading technical discussions, influencing research, and delivering end-to-end solutions that shape the future of semiconductor testing.

Requirements

Bachelor’s degree (or higher) in Electrical Engineering, Computer Engineering, Computer Science, or a related field
5–7 years of hands-on experience developing and debugging test programs, test methods, and libraries on V93000 using SmarTest8
Proficiency in Java for test program and test method development
Hands-on experience with wafer-level (die-level) testing, including working directly with silicon and dies using die-level probers
Proven experience managing thermal aspects of test devices, including temperature-dependent behavior and test execution across thermal conditions
Hands-on experience working with V93000 hardware, load boards, probe cards, and prober integration
Proven ability to debug and resolve issues end-to-end, spanning software, hardware, silicon, and thermal domains
Ability to lead technical discussions and influence technical decisions
Ability to work both independently and within a team in a fast-paced, changing environment
Self-motivated, proactive, and execution-focused

Nice To Haves

Experience developing test programs for digital and high-performance compute (HPC) devices
Deep understanding of V93000 system architecture, wafer-level test flows, and best practices
Strong understanding of high power devices and their thermal behavior at wafer level

Responsibilities

Lead the design, development, execution, and debugging of test programs on the Advantest V93000 platform
Develop test programs, test methods, and reusable libraries using C++ and Java in SmarTest8
Own wafer-level (die-level) test program development, including silicon bring-up, characterization, and support using die-level probers
Manage and optimize thermal aspects of device testing, including temperature control strategies, thermal limitations, and correlation of electrical behavior across temperatures
Work with high-power devices and develop test programs that actively manage power dissipation and thermal constraints during testing, ensuring safe operation, test integrity, and repeatable results across operating conditions
Execute, debug, and resolve test program issues on both, offline and online systems
Provide end-to-end ownership of test solutions, spanning ATE hardware, probers, load boards, probe cards, and test software
Debug and resolve complex issues across hardware, software, silicon, and thermal domains
Act as the primary technical interface for cross-functional teams, leading technical discussions, design reviews, and root-cause analysis sessions
Support requirements analysis, benchmark testing, demonstrations, and training
Collaborate closely with R&D, COE, and global engineering teams to develop next-generation wafer-level and system-level test solutions
Partner with leading customers on next‑generation high‑power devices to co‑define advanced test requirements, exploring power delivery, thermal management, and wafer‑level test methodologies on the V93000 platform
Lead customer‑facing engagements—including technical discussions, deep‑dives, and pilot programs—to prototype and validate high‑power, thermally‑constrained test solutions, transforming early concepts into scalable test programs, methods, and reusable frameworks.