Lead Analog IC Design Engineer

Cadence Systems • San Jose, CA

3d

About The Position

The Lead Analog IC Design Engineer is responsible for designing and developing analog and mixed-signal circuits- from initial concept and specification through final verification- to ensure conformance with customer requirements.

Requirements

• At least three years of experience designing and developing CMOS SerDes or high-speed I/O integrated circuits.
• Design experience with most of the following SerDes circuit blocks: Transmitters and receivers, serializers and deserializers, phase interpolators, low-jitter PLLs, high-speed clock-distribution circuits, bias circuits, and voltage regulators.
• Good understanding of jitter and signal-equalization techniques.
• Proficiency with CAD tools for circuit simulation, layout, and physical verification.
• Master’s degree or Ph.D. in electrical engineering.
• Strong problem-solving skills and analog design aptitude.
• Clear written and verbal communication skills.
• Ability to collaborate effectively in a team environment.

Nice To Haves

• Working knowledge of common SerDes standards and their electrical requirements.
• Experience with Cadence design tools and laboratory testing.
• Design experience at data rates above 10 Gbps and in process technologies below 28 nm.

Responsibilities

• Designing and developing analog and mixed-signal circuits from initial concept and specification through final verification.
• Ensuring conformance with customer requirements.

Benefits

• paid vacation
• paid holidays
• 401(k) plan with employer match
• employee stock purchase plan
• a variety of medical, dental and vision plan options

What This Job Offers

• Job Type: Full-time
• Career Level: Senior