Layout Engineer (7753)

TSMC•San Jose, CA

1d•$120,182 - $167,000•Onsite

About The Position

Coordinate design changes and design fitting issues, and other technical data to ensure customer’s design can fit TSMC’s production flow and procedures. Specific tasks will include but not be limited to: Acting as liaison between customer and TSMC fab manufacturing staff; Providing training and on-site support to TSMC’s US customers of TSMC specific advanced processing analog block layout; Utilizing knowledge of TSMC’s design rules; and Implementing blocks of customer’s chip, covering floor plan, timing and noise closure and power planning. Provide analog block layout floor-plan and layout guideline.

Requirements

Bachelor’s degree or foreign equivalent in Electrical Engineering, Photonics and Optoelectronics, Computer Science or related field
Three (3) years of experience in a related position
Knowledge of chip implementation technology and semiconductor fabrication processes and procedures
Knowledge in ANALOG layout skills, mixed-mode electronic circuits, and semiconductor device expertise
Knowledge of layout tools such as VIRTUOSO
Knowledge of verification tools including Calibre

Responsibilities

Acting as liaison between customer and TSMC fab manufacturing staff
Providing training and on-site support to TSMC’s US customers of TSMC specific advanced processing analog block layout
Utilizing knowledge of TSMC’s design rules
Implementing blocks of customer’s chip, covering floor plan, timing and noise closure and power planning
Provide analog block layout floor-plan and layout guideline