2027 Internship - Layout Design

Cirrus Logic • Austin, TX

1d • Hybrid

About The Position

As a Layout Design Intern at Cirrus Logic, you will work with experienced design and circuit engineers on the physical layout and verification of high-performance mixed-signal CMOS integrated circuits. You will gain hands-on experience translating circuit designs into layouts, learning how layout choices can affect circuit performance, and using industry tools such as Cadence Virtuoso XL and Calibre. Interns can ask questions, learn from teammates, and contribute at a level appropriate to their experience; prior familiarity with every tool or technique is not required.

The role follows Cirrus Logic’s 2+ day in-office schedule, though interns should expect to work in the office more often—up to five days per week—depending on business needs and team preference. Interns must be within commuting distance of the job location or willing to relocate before starting. The role does not offer visa sponsorship, and candidates must be able to access technical data without Cirrus Logic obtaining an export license.

Requirements

• Be enrolled in a bachelor's, master's, or PhD program in computer science, computer engineering, electrical engineering, or a related field.
• Demonstrate curiosity about integrated circuits, semiconductor design, or analog and mixed-signal electronics.
• Have an interest in learning how circuit layouts are planned, built, and verified.
• Bring a thoughtful, problem-solving approach and willingness to ask questions.
• Communicate clearly and show an interest in collaborating with a team.
• Demonstrate care and attention to detail when working through technical problems.
• Be able to access technical data without requiring Cirrus Logic to obtain an export license.

Nice To Haves

• Relevant coursework or project experience for candidates pursuing a bachelor's degree in Electrical Engineering or Electrical Engineering Technology.

Responsibilities

• Create and refine analog and mixed-signal circuit layouts with guidance from design engineers.
• Help investigate layout issues and explore possible solutions.
• Collaborate with circuit and design engineers to support circuit performance.
• Learn how layout planning, integration, and routing work at the block and chip levels.
• Gain exposure to verification workflows and tools such as Cadence Virtuoso XL and Calibre.
• Explore techniques used for device matching and signal conditioning and protection.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern
• Education Level: No Education Listed