IP Verification Engineer

Ericsson • Austin, TX

9d • Hybrid

About The Position

Ericsson is hiring an engineer for its ASIC IP organization in Austin, Texas, to verify functional RTL blocks used in 5G infrastructure. The role spans the verification stack and includes technical and organizational leadership as the team grows. The engineer will develop transaction-level models, own block- and top-level verification sign-off, architect UVM testbench environments, use hardware emulation and acceleration, and bridge hardware and software verification. The position also involves mentoring engineers, influencing methodology, and helping shape the team’s growth. This is not a remote opportunity; the posting describes an on-site role with a hybrid work schedule.

Requirements

• Several years of hands-on, industry RTL verification experience at block and/or top level.
• Strong SystemVerilog and UVM skills, including verification environment architecture.
• Experience building testbenches from the ground up.
• Familiarity with technologies such as SerDes, PCIe, ARM subsystems, DSPs or accelerators, or Ethernet.
• Scripting fluency in TCL, Python, Perl, or an equivalent language.
• Communication skills commensurate with technical expertise.
• B.S. or M.S. in Electrical Engineering or Computer Engineering, or equivalent education.

Nice To Haves

• Ownership of test plans and experience creating directed and randomized test cases from scratch.
• Embedded software fluency in C and/or assembly, including experience designing and testing embedded software.
• Understanding of embedded CPUs, memory systems, caches, and coherency protocols; ARM-based experience is a strong plus.
• Experience with AMBA interfaces such as APB, AXI, ACE-Lite, or CHI.
• Comfort working with Linux, GIT, and LSF.
• Leadership experience or a strong interest in taking on more leadership.
• Object-oriented programming and code design skills.

Responsibilities

• Build transaction-level models to provide early architectural confidence.
• Own verification sign-off at block and top levels.
• Design and build UVM testbench environments from the ground up.
• Use hardware emulation and acceleration to extend verification beyond simulation.
• Perform software-driven verification across the hardware/software boundary.
• Mentor engineers, influence verification methodology, and help shape team growth.

Benefits

• Competitive compensation and an opportunity for an annual performance-based bonus.
• Three medical plan options and a dental plan option, with company credits toward premiums for employees and eligible dependents.
• 401(k) plan with an automatic 3% company contribution and matching contributions of up to 4% when the employee contributes at least 5% of eligible pay.
• Company credits toward basic life insurance, accidental death and dismemberment coverage, and short- and long-term disability coverage.
• Option to participate in the Ericsson Stock Purchase Plan.
• At least 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually.
• Up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay.
• Financial wellness programs, educational assistance, matching gifts, and recognition programs.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior