Intern - ATE Process Engineer, PCVD ID1

Micron Technology•Boise, ID
•Onsite

About The Position

Micron’s Boise site is undergoing a $15 billion investment in semiconductor manufacturing, with DRAM production planned for the second half of the decade. The High Volume Manufacturing (HVM) team drives innovation, operational excellence, and factory performance to deliver memory solutions at scale. The team works hands-on with manufacturing processes, equipment, and data to affect yield, output, and cost. As an ID1 High Volume Manufacturing Process Engineer Intern, you will focus on process optimization, yield improvement, and cost reduction in a fast-paced fab environment. You will collaborate with equipment engineers, operations leaders, and multifunctional partners, using data-driven and AI-enabled approaches to improve process stability and wafer output.

Requirements

  • Currently pursuing a STEM degree with an expected graduation between May and June 2027.
  • Available to work approximately 20 hours per week on-site in Boise, Idaho, for 6–8 months; the preferred period is September 2026 through May or June 2027.
  • Foundational knowledge of Statistical Process Control (SPC) and Design of Experiments (DOE).
  • Experience with one or more programming or data tools, such as Python, Java, MATLAB, Tableau, or Microsoft Excel.
  • Strong problem-solving and analytical skills, including exposure to AI-supported tools or data-driven methodologies.

Nice To Haves

  • Experience in semiconductor manufacturing, process engineering, or sustaining environments.
  • Familiarity with data collection systems, data cleansing, and database querying.
  • Hands-on experience with data analysis, visualization, and interpretation of large datasets.
  • Basic understanding of semiconductor fab processes, equipment, and yield drivers.
  • Strong communication, organization, and time-management skills, with the ability to collaborate in team environments.

Responsibilities

  • Monitor and analyze production data to identify process shifts, yield loss, and defect trends affecting wafer output.
  • Apply SPC, FDC, and structured problem-solving methods such as 8D to improve process capability and tool performance.
  • Partner with equipment and operations teams to resolve excursions, defects, and throughput issues.
  • Implement projects to optimize wafer processing, improve yield, and increase wafer outs.
  • Use AI-enabled or AI-assisted analytics tools to enhance data analysis, anomaly detection, and manufacturing decision-making.

Benefits

  • Choice of medical, dental, and vision plans.
  • Programs to help protect income if unable to work due to illness or injury.
  • Paid family leave.
  • Paid time off.
  • Paid holidays.
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