III-V Device Engineer
About The Position
Skorpios Technologies, Inc. are innovators in heterogeneous integration of silicon photonic technology and semiconductor development. The company is rapidly expanding the technical organization and seeking Sr. Simulation Engineers specializing in Optical and Photonics modeling. These roles are critical in developing the next generation of disruptive III-V and Silicon Photonics integrated products. The Sr. Simulation Engineer is responsible for high-fidelity modeling and simulation of complex photonic integrated circuits (PICs). You will lead the virtual prototyping of high-performance devices—including lasers, modulators, and passive optical components—ensuring designs are optimized for Skorpios’ unique technology platform. Operating with an in-house foundry, these roles serve as the essential bridge between theoretical physics and rapid hardware implementation.
Requirements
- Experience with Keysight ADS, Ansys HFSS, or CST Microwave Studio.
- Advanced proficiency in Python or MATLAB for automation and large-scale data analysis.
- Deep understanding of bandgap engineering, carrier dynamics, recombination mechanisms, and band structures.
- Strong knowledge of how epitaxy growth, etching profiles, and metalization affect optical modes.
- Familiarity with fiber coupling and Co-Packaged Optics (CPO).
- Ability to synthesize large datasets and utilize statistical tools (e.g., JMP or Minitab) for performance reporting.
- Proven ability to present complex technical trade-offs to engineering teams, executive leadership, and customers.
- Strong troubleshooting skills in resolving discrepancies between modeled and measured device performance.
- M.S. or Ph.D. in Physics, Electrical Engineering, Material Science, or a related field with an emphasis on computational photonics.
- 5+ years of industrial experience in photonics simulation and design, with a proven track record of bringing products from concept through in-house manufacturing.
- Must be a 'U.S. person' within the meaning of ITAR (U.S. Citizen, U.S. Permanent Resident, Political Asylee, or Refugee).
Responsibilities
- Optimize epitaxy layers and quantum well designs.
- Perform optical mode and impedance matching across diverse material interfaces to ensure seamless III-V and Silicon integration.
- Partner directly with the internal Fab and Device Designers to translate simulations into actionable layouts.
- Establish process design rules and perform DRC (Design Rule Check) and LVS (Layout Versus Schematic) to ensure tapeout accuracy.
- Execute virtual Design of Experiments (DOE) to predict device reliability and performance.
- Validate simulation outputs against internal lab characterization data to refine material parameters and "close the loop" on model accuracy.
Benefits
- Competitive Salary
- Medical
- Dental
- Vision
- 401(k)
- Company paid Life Insurance
- Company paid Disability
- Paid Holidays
- Paid Vacation
- Gym Membership Discounts
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What This Job Offers
Job Type
Full-time
Career Level
Senior
