IC Verification Engineer

Broadcom • San Jose, CA

2d

About The Position

The IC Verification Engineer architects and develops scalable, reusable testbench environments using verification methodology frameworks. The role leads verification planning and execution for block, core, and system-on-chip features, including functional coverage, pseudo-random testing, regression debugging, and verification closure. The engineer works with the broader team, mentors junior engineers, and leads documentation and reviews with design and architecture teams, while improving verification quality and efficiency.

Requirements

• Bachelor's degree in Electrical Engineering, Electronics, or equivalent and 12+ years of experience; or a master's degree in Electrical Engineering, Electronics, or equivalent and 10+ years of experience.
• 10+ years of experience developing complex verification environments, test plans, functional coverage, and pseudo-random testing.
• Experience taking an ASIC through a full cycle, from architecture development to tapeout, with a full focus on verification.
• Proficiency in SystemVerilog and verification methodologies such as UVM or VMM.
• Strong debugging skills for analyzing regression failures and understanding complex designs.
• A good understanding of a complex protocol such as PCI Express or another multilayered protocol.
• Ability to work with the team and mentor junior engineers.

Nice To Haves

• Experience with the PCIe protocol.
• Scripting knowledge in Python or Perl.
• Comfort with Makefiles.
• Experience verifying other protocols such as AXI.

Responsibilities

• Architect and develop scalable, reusable testbench environments using verification methodology frameworks.
• Drive test plans for block, core, and SOC features and write functional coverage for those features.
• Build pseudo-random tests to verify features and achieve full functional coverage.
• Debug regression failures, analyze functional coverage gaps, and improve tests to address the gaps.
• Work with team members and guide or mentor junior team members.
• Devise out-of-the-box ways to stress the DUT and verify it efficiently.
• Lead documentation of verification strategy, including test plans, verification environments, and pseudo-random tests.
• Lead reviews with design and architecture teams.
• Drive verification quality and efficiency improvements.

Benefits

• Discretionary annual bonus eligibility.
• Competitive new-hire equity grant and potential annual equity awards.
• Medical, dental, and vision plans.
• 401(k) participation with company matching.
• Employee Stock Purchase Program (ESPP).
• Employee Assistance Program (EAP).
• Company-paid holidays.
• Paid sick leave and vacation time.
• Paid Family Leave and other leaves of absence in accordance with applicable laws.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior