HW Security Design Engineer

Qualcomm•San Diego, CA

5d•$164,000 - $246,000

About The Position

As a member of the uArchitecture/Design team, you will comprehend, interpret, and implement architectures and designs for multiple QCOM IPs from high-level specifications. You will also capture these approaches in detailed documents that can be consumed by both design and verification teams as part of a tightly-integrated team producing cutting-edge chips at scale.

Requirements

10+ years of experience with digital logic design and uArchitecture definition
Hands-on experience with VLSI/ASIC design and implementation
Familiarity with AHB, AXI, or APB protocols
Experience with technical document creation and maintenance for digital designs
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Nice To Haves

In-depth knowledge of AES/SHA algorithms and modes and key handling principles
Experience with FIPS or Common Criteria certification
Experience implementing AHB/AXI/APB protocols
Experience with high-throughput architectures for cryptographic processing

Responsibilities

Work with architects to comprehend and interpret high-level specifications related to internal QCOM security IPs
Define and describe appropriate micro-architectures to meet the high-level specifications and deliver a micro-architecture document according to a defined schedule
Communicate with design and DV representatives to vet the document quality and useability
Be ready to implement (design/code) the design yourself, if needed
Follow IP updates and chip schedules to perform effort planning