New College Grad - HBM Design Architect

Micron Technology • Richardson, TX

3d

About The Position

Micron Technology’s High Bandwidth Memory (HBM) Design Architecture team develops memory solutions for AI accelerators, high-performance computing, and data centers. The Roadmap and Pathfinding group identifies, assesses, and enables new memory and advanced packaging technologies for future HBM products, translating them into credible product architectures.

The HBM Design Architect performs first-principles architecture analysis for current and future HBM/DRAM products, including dynamic power, power delivery network (PDN), thermal, timing, and area trade-offs, and runs circuit and CAD simulations to validate the analysis. The role works closely with designers and technologists to develop architectural solutions and informs decisions about which architecture and technology options advance toward product.

Requirements

• BSEE or related field with 0–2 years of relevant experience, or MS/PhD with 0–2+ years of relevant experience.
• Solid foundation in CMOS circuit design and device physics.
• Working knowledge of DRAM fundamentals, including cell/array operation, sensing, and basic timing.
• Understanding of power delivery and power analysis, including CV²f, leakage, and IR drop, and thermal concepts for semiconductor dies.
• Hands-on experience with circuit simulation such as SPICE/HSPICE, FineSim, or equivalent, and Cadence Virtuoso or similar CAD environments.
• Proficiency in Python, Tcl, Perl, or another scripting language.

Nice To Haves

• Coursework, research, or experience in DRAM/HBM design, TSV-based 3D integration, or advanced packaging.
• Exposure to PDN/power analysis tools or thermal simulation, such as compact thermal models or FEA/CFD.
• Familiarity with semiconductor process technology, including FEOL/BEOL, interconnect materials, and bonding.
• Experience using AI-enabled tools, including LLMs, AI assistants, Code Assist/Roo Code, or agentic AI solutions, for engineering automation and analysis.
• Strong analytical skills and a curiosity-driven, first-principles approach.
• Ability to communicate technical trade-offs clearly to designers and technologists.

Responsibilities

• Perform architecture-level analysis for HBM/DRAM products, including dynamic and static power, PDN/IR drop, thermal behavior, timing, and area trade-offs.
• Build first-principles models and contributor breakdowns for array, periphery, datapath, I/O, and TSV, and correlate them with simulation and silicon data.
• Set up and run circuit simulations and associated CAD flows, including schematic setup, parasitic extraction, and post-layout simulation, to validate architectural assumptions.
• Assess the impact of new technologies on product metrics, including advanced DRAM nodes, 3D stacking, scaled-pitch hybrid bonding, and BEOL/TSV changes.
• Partner with circuit designers, process technologists, and packaging engineers to develop and quantify architectural solutions.
• Develop scripts, calculators, and automation using Python or equivalent, including AI-assisted workflows, to accelerate modeling, simulation setup, and data analysis.
• Communicate results in architecture reviews and cross-functional working groups.

Benefits

• Medical insurance plans
• Dental insurance plans
• Vision insurance plans
• Income protection benefits in the event of illness or injury
• Paid family leave
• Paid time off
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level