Hardware Senior Principal Engineer

Dell Technologies•Austin, TX

About The Position

Dell Technologies’ Emerging Technologies Engineering organization develops AI server, L11 rack-scale, and cluster-scale solutions. The Senior Principal Hardware Engineer will lead the architecture, development, integration, validation, and lifecycle support of next-generation AI server, storage, networking, and rack-scale infrastructure platforms. The role serves as a technical authority for PCI Express, memory, power delivery, and systems management, guiding products from concept through deployment, sustaining engineering, and customer support. The engineer drives platform innovation, quality, reliability, and performance while working with silicon vendors, ODMs, manufacturing, quality, firmware, systems engineering, and hyperscale customers. This senior technical leader guides critical investigations, root-cause analysis, and customer escalations, and influences future platform architectures across multiple engineering organizations. The position is based in Austin, Texas.

Requirements

Bachelor’s degree in Electrical/Computer Engineering or a related field.
15+ years of experience leading electrical hardware engineering, platform architecture, and infrastructure development initiatives.
Deep expertise in server and rack-scale electrical architectures, including PCIe Gen4/Gen5/Gen6, memory subsystems such as DDR4/DDR5, HBM, RDIMM, and MRDIMM, and high-speed signaling with strong SI/PI knowledge.
Extensive experience designing and validating power delivery architectures, power distribution networks, voltage regulation, sequencing, telemetry, and platform management solutions, including BMC and system serviceability.
Proven success leading complex hardware development programs from concept through production.
Strong knowledge of validation, qualification, manufacturing, reliability engineering, and system-level root-cause analysis.
Ability to drive technical strategy across organizations, lead executive-level technical reviews and customer engagements, and influence cross-functional engineering teams to deliver business-critical outcomes.

Nice To Haves

Master’s degree in Electrical Engineering or a related field.
Expertise in AI/HPC platforms using NVIDIA HGX, NVL72, GB200/GB300, or B100/B200.
Familiarity with emerging technologies including CXL, PCIe Gen7, memory pooling, composable infrastructure, and rack-scale power and cooling architectures.
Hands-on experience with platform management ecosystems including OpenBMC, Redfish, PLDM, MCTP, and IPMI.
Experience with hyperscale datacenter deployments.
Experience using advanced design and analysis tools such as Cadence, HyperLynx, Sigrity, Ansys, and ADS.
Experience with failure analysis and resiliency methodologies.
Experience collaborating with silicon vendors, ODMs, cloud providers, and strategic customers.

Responsibilities

Lead PCIe architecture strategy and technology roadmaps for AI infrastructure platforms, including compliance, interoperability, validation, debugging, performance optimization, and development standards.
Define memory subsystem architectures, validation methodologies, and design requirements; lead investigations into memory performance, reliability, qualification, and field quality improvements.
Drive platform- and rack-level power architecture development, including power delivery, voltage regulation, sequencing, telemetry, power integrity, and efficiency, scalability, and resiliency optimization.
Define systems management and serviceability strategies, including BMC, telemetry, health monitoring, diagnostics, remote management, observability, and fleet-management capabilities.
Lead architecture, development, integration, validation, and lifecycle support for next-generation AI server, storage, networking, and rack-scale infrastructure platforms.
Partner with silicon vendors, ODMs, manufacturing, quality, firmware, systems engineering, and hyperscale customers to drive platform innovation, quality, reliability, and performance.
Lead critical technical investigations, root-cause analysis, and field escalations, and influence future-generation platform architectures.
Provide strategic technical leadership across engineering organizations to deliver robust, scalable, serviceable, and highly available infrastructure solutions.
Guide customer escalations and root-cause investigations, and lead executive-level technical reviews and customer engagements.