FPGA Manager (Teradyne, North Reading, MA)

Teradyne•North Reading, MA

6d•Onsite

About The Position

Teradyne’s Power Test Division is seeking an experienced and highly motivated FPGA developer to help shape the future of power semiconductor test systems. As an FPGA Engineering Manager, you will serve as a formal people manager and technical contributor on a world‑class engineering team developing next‑generation power test platforms. You will collaborate closely with hardware, firmware, and software teams to define FPGA functionality, architect scalable solutions, and bring complex systems from concept through production.

Requirements

10+ years of experience in FPGA design, implementation, and verification
Strong proficiency in Verilog for FPGA synthesis
Hands‑on experience with AMD (Xilinx) and/or Intel (Altera) FPGA toolchains, including IP configuration and timing constraint development
Proven design experience with digital and mixed‑signal interfaces such as high‑speed serial interfaces (e.g., PCIe, SerDes), memory interfaces (DDR), ADCs/DACs, and control and communication protocols (AXI4, SPI, I²C, USB)
Experience building verification environments, simulations, and testbenches for new FPGA features
Ability to read and interpret schematics and understand digital hardware design
Experience validating FPGA functionality on real hardware platforms
Strong communication skills and ability to collaborate across disciplines and cultures
Driven, self-starter mindset with a bias for action and strong ownership from problem definition through delivery
Demonstrated ability to build and lead teams—recruiting, onboarding, mentoring, and creating an environment where engineers can do their best work
Experience as a direct people manager (or strong readiness to step into formal people leadership), including goal setting, regular feedback, and performance development
Comfortable as both a coach and a player: able to lead, delegate, and develop others while remaining hands-on in architecture, implementation, and debugging
Strong communication and stakeholder management skills, with the ability to align cross-functional partners and influence without authority

Nice To Haves

Familiarity with FPGA SoC devices and embedded processor subsystems
Experience with SystemVerilog and/or UVM‑based verification
Basic scripting experience in TCL and/or Python
Exposure to control systems, real‑time systems, or high‑reliability designs
Interest or experience in power electronics, semiconductor test, or high‑power systems is a strong plus

Responsibilities

Mentor and coach engineers, providing technical guidance, code/design reviews, and support for professional development
Manage and lead a team of FPGA engineers (direct reports): set goals and priorities, delegate effectively, run regular 1:1s, and ensure on-time, high-quality delivery
Manage a verification team, including external partners, to ensure clear scope, priorities, quality expectations, and execution cadence
Develop and implement FPGA designs for advanced power semiconductor test systems
Collaborate with cross‑functional teams to define FPGA requirements and write detailed specifications aligned with product and system‑level needs
Drive FPGA development from architecture and IP selection through implementation, verification, and release
Contribute to FPGA‑related hardware design decisions including device selection, pinout planning, and high‑speed interfaces
Support firmware and software teams during board bring‑up, system integration, and factory readiness
Perform hands‑on debugging and validation using lab equipment such as logic analyzers, oscilloscopes, and JTAG tools
Help evolve FPGA architectures to support high‑throughput, deterministic, and scalable power test solutions for emerging workloads including AI and wide‑bandgap devices
Foster a culture of ownership, continuous improvement, and inclusive collaboration; recognize contributions and address issues constructively