FPGA IP Software Design Engineer

AlteraToronto, ON

About The Position

About Altera At Altera™, our independence as the world’s largest pure‑play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry. About the Role Altera's NoC functional team develops comprehensive solutions to provide customers easy and efficient access to the capabilities of Altera's FPGA devices. These solutions are provided as highly configurable intellectual property IP cores that are fully integrated with Altera's software CAD tool, Quartus Prime. We build IP cores to enable the use of a high speed NoC used to communicate between core fabric and peripheral components such as memory, PCIe and the hard processor system. These IP cores provide configurable access to the high-speed, high-bandwidth interconnect that is used by most customers that require some form of packet processing, storage or buffering, and thus, these IP cores become a critical component of most electronic systems. The constantly rising speed and complexity of memory devices, chip-to-chip, and transceiver interfaces presents a challenging design problem that requires system level knowledge of silicon, software, IP, and customer applications. As an IP Design Engineer, you will work with a team of engineers to develop and verify state-of-the-art NoC IP cores. You will be working on advanced device architectures, design definition, implementation, and verification. You will also be developing design examples and simulation models, accompanied by a rich set of technical documentation.

Requirements

  • Bachelor's degree or Master's degree in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science or equivalent
  • 4+ years of experience in Digital logic hardware (e.g. SystemVerilog, Verilog and/or VHDL) design or verification
  • 4+ years of experience in Software programming or scripting (e.g. C/C++ and/or Python)
  • The candidate should possess the following behavioral traits: Strong skills in communication, initiative, innovation, and teamwork
  • Highly motivated to learn and adapt to fast-changing technologies and environments
  • Excellent problem-solving skills and attention to detail
  • Demonstrate fundamental values such as accountability, integrity, and a winning mindset
  • Collaborative mindset, strong influencing skills, and a willingness to work across geographical locations.

Nice To Haves

  • 6+ year of experience with IP Integration, RTL Design, SystemVerilog, Verilog and/or VHDL
  • 6+ year of experience with software programming and/or scripting languages (e.g. C/C++ and/or Python)
  • FPGA design experience
  • Experience with RTL simulation, timing closure, STA
  • Experience with Memory Interfaces, Network-on-Chip, High-speed ADC/DAC, or Transceiver Protocols (e.g. Ethernet, PCIe)

Responsibilities

  • Architecture and Design and RTL development based on specifications
  • Device support and CAD tool integration
  • Verification (e.g. verification IP, methodologies, frameworks, bus functional models, regression tests)
  • Hardware power-on and debug
  • New product release and rollout support
  • Customer technical support
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