FPGA Engineer

Quest Defense Systems & Solutions•Tucson, AZ

1d•Onsite

About The Position

Quest Defense Systems and Solutions is hiring FPGA Engineers at mid, senior, and principal levels to design and verify digital logic solutions on major FPGA platforms, including Xilinx, Altera, and Microsemi. The work covers the full development lifecycle, from requirements definition and architecture through VHDL coding, simulation, integration, debugging, documentation, and production support. Applications include gigabit serial interfaces, RF/EO digital signal processing, controls, embedded processing, and processor interfaces. Engineers collaborate with circuit card designers and systems engineers throughout development. The position is onsite in Tucson, Arizona. U.S. citizenship and an active DoD security clearance are required. Relocation assistance is available. The posted pay range is $145,000–$185,000 USD, with the full compensation package based on experience and certifications. Quest Defense describes its work as mission-critical aerospace and defense engineering, supported by collaborative teams and opportunities for career growth. The company states that it has over 25 years of aerospace and defense engineering expertise and provides equal employment opportunities without discrimination or harassment.

Requirements

For mid-level roles: at least 5 years of experience, including experience in at least one of the following areas: digital design and VHDL coding; Xilinx or Microsemi devices/tools; delivering FPGA solutions to system-level applications; or hands-on FPGA integration and debugging.
For senior/principal-level roles: at least 8 years of experience, including experience in at least one of the listed FPGA areas.
Senior/principal candidates must be able to support complex design efforts from concept through production and have experience collaborating with multidisciplinary engineering teams.
U.S. citizenship is required.
An active DoD security clearance is required.

Nice To Haves

Experience in radar or image processing (RF/EO).
Embedded systems design using ARM, MicroBlaze, or Nios processors.
Experience with gigabit serial interfaces and multi-gigabit transceivers (MGTs).
UVM/SystemVerilog-based constrained-random verification experience.
Verification experience using emulation platforms such as Veloce.

Responsibilities

Architect FPGA-based systems, including determining interfaces, selecting devices, and defining the concept of operations (CONOPS).
Translate system-level requirements into FPGA requirements.
Design and code FPGA implementations in VHDL, emphasizing reliability and maintainability.
Perform simulation, place-and-route, and verification using directed tests and constrained-random techniques.
Track functional and code coverage during verification.
Integrate and debug designs in laboratory environments.
Deliver production-quality FPGA releases from prototype through full production.
Create requirements, verification plans, user guides, and other detailed documentation.
Support internal and external technical reviews.
For senior/principal-level work, support complex design efforts from concept through production and collaborate with multidisciplinary engineering teams.