FPGA Engineer

Quest Defense Systems & Solutions, Inc.•Tucson, AZ

2d•$145,000 - $185,000•Onsite

About The Position

Quest Defense Systems and Solutions is hiring FPGA Engineers at mid-level and senior/principal levels to design and verify digital logic solutions for major FPGA platforms, including Xilinx, Altera, and Microsemi. The work covers the full development lifecycle, from requirements definition and architecture through VHDL coding, simulation, integration, debugging, documentation, and production support. Applications include gigabit serial interfaces, RF/EO digital signal processing, controls, embedded processing, and processor interfaces. Engineers collaborate with circuit card designers and systems engineers throughout development. The position is onsite in Tucson, Arizona. Relocation assistance is available. U.S. citizenship and an active DoD security clearance are required. Compensation is based on experience and certifications, with a stated pay range of $145,000–$185,000. Quest Defense describes its work as mission-critical aerospace and defense engineering and highlights collaborative teams, supported career growth, and a flexible, people-first workplace. Benefits include competitive pay, medical, dental, life, and disability coverage, an employer-matched 401(k), certification assistance, and professional development support.

Requirements

For mid-level roles, at least 5 years of experience, including at least one of the following: digital design and VHDL coding; Xilinx or Microsemi device/tools experience; delivering FPGA solutions to system-level applications; or hands-on integration and debugging.
For senior/principal roles, at least 8 years of experience, including at least one of the listed FPGA experience areas.
Senior/principal candidates must be able to support complex design efforts from concept through production.
Senior/principal candidates must have experience collaborating with multidisciplinary engineering teams.
U.S. citizenship is required.
An active DoD security clearance is required.

Nice To Haves

Experience in radar or image processing (RF/EO).
Embedded systems design using ARM, MicroBlaze, or Nios processors.
Experience with gigabit serial interfaces and multi-gigabit transceivers (MGTs).
UVM/SystemVerilog-based constrained-random verification experience.
Verification experience using emulation platforms such as Veloce.

Responsibilities

Architect FPGA-based systems, including determining interfaces, device selection, and concept of operations (CONOPS).
Translate system-level requirements into FPGA requirements.
Design and code FPGA implementations in VHDL, emphasizing reliability and maintainability.
Perform simulation, place-and-route, and verification using directed tests and constrained-random techniques.
Track functional and code coverage during verification.
Integrate and debug designs in lab environments.
Deliver production-quality FPGA releases from prototype through full production.
Create detailed requirements, verification plans, and user guides.
Support internal and external technical reviews.