FPGA Development Tools Engineer

Altera•San Jose, CA

1d•Onsite

About The Position

Altera is seeking an FPGA Development Tools Engineer to design, develop, and enhance the next generation of FPGA software development tools. In this role, you will work on industry-leading toolchains that enable customers to efficiently design, simulate, compile, debug, and optimize FPGA-based systems. You will collaborate closely with architecture, RTL, verification, and customer-facing teams to deliver high-performance, scalable, and user-friendly FPGA development solutions.

Requirements

Bachelor’s or Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Strong experience with FPGA design flows and development tools
Proficiency in C/C++ (required)
Python experience strongly preferred
Solid understanding of digital logic design, timing, and hardware architecture
Experience with HDL languages (Verilog, SystemVerilog, VHDL)
Familiarity with synthesis, timing analysis, and place-and-route concepts
Experience working in large, complex software codebases
Strong problem-solving and debugging skills
Applicants must be eligible for any required U.S. export authorizations.

Nice To Haves

Experience developing or maintaining FPGA or EDA tools
Knowledge of Quartus, Platform Designer, or comparable FPGA tools
Experience with EDA algorithms (graph algorithms, optimization, constraint solving)
Familiarity with ASIC or FPGA timing closure methodologies
Experience with multi-threaded and high-performance software
Knowledge of scripting (Tcl, Python) used in hardware design automation
Experience working directly with customers or field applications teams

Responsibilities

Develop and maintain FPGA development tools including synthesis, place-and-route, timing analysis, debugging, and simulation workflows
Enhance and support Altera’s FPGA software toolchain (e.g., Quartus, platform designer, and associated utilities)
Design algorithms and data structures for performance, scalability, and correctness across large FPGA devices
Work with hardware architects to align tool capabilities with new FPGA features and architectures
Develop C/C++ and/or Python-based infrastructure and automation supporting FPGA design flows
Debug complex issues across software and hardware boundaries
Optimize compilation runtime, quality-of-results (QoR), and memory usage
Contribute to tool usability, documentation, and customer-facing improvements
Support internal and external users, including escalation of critical tool issues
Participate in code reviews, design discussions, and continuous improvement initiatives