FPGA Design/Verification Engineer - HYBRID

The Structures Company•Littleton, CO

2d•Hybrid

About The Position

The FPGA Design/Verification Engineer verifies FPGA and/or ASIC devices and programs in HDL using VHDL, Verilog, and/or SystemVerilog. The role applies UVM, OVM, or VMM verification methodologies and supports the ASIC/FPGA development life cycle, including architecture, design, simulation, verification, validation, integration, and test. Work involves scripting languages such as Perl, TCL, and Python in a Linux environment. FPGA/ASIC design experience is a plus. This is an 11-month contract with potential for extension, based in a hybrid work arrangement in Littleton, Colorado. The position is listed as first shift, 4/10. Candidates must be U.S. Persons under ITAR regulations.

Requirements

Must be a U.S. Person as defined under ITAR regulations.
Bachelor of Science or higher from an accredited college in Electrical Engineering or a related discipline, or equivalent experience and combined education.
Experience verifying FPGA and/or ASIC devices.
HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
Experience in a Linux environment.
Experience with UVM verification methodologies such as UVM, OVM, or VMM.
Experience across the ASIC/FPGA life cycle, including architecture, design, simulation, verification, validation, integration, and test.
Experience with scripting languages such as Perl, TCL, and Python.
At least 9 years of experience; senior-level candidates only.
Ability to commute to the job location or relocate if necessary.