Principal/ Sr. Principal FPGA Design Engineer

Northrop Grumman•Rolling Meadows, IL

5d•$119,600 - $223,900•Onsite

About The Position

At Northrop Grumman, we offer incredible opportunities to work on revolutionary systems that impact people's lives globally. Our pioneering spirit has led to technological advancements, and we seek individuals with bold ideas and a pioneering spirit to join us in inventing the future. Our culture fosters intellectual curiosity, cognitive diversity, and encourages employees to bring their whole selves to work. We are looking for individuals who are driven to achieve the seemingly impossible. Join Northrop Grumman Space Systems to embark on a career in developing innovative, reliable, and agile products for space exploration, national defense, and scientific discovery. Our team is dedicated to providing the skills and technologies to develop, design, produce, and sustain optimized product lines, offering a decisive advantage to the warfighter. We are seeking a talented FPGA Design Engineer with signal processing experience to join our growing team in Rolling Meadows, IL. In this role, you will be responsible for research, requirements analysis, systems architecture, design, coding, test bench design, verification, synthesis, and place & route for our digital signal processing products. You will work with digital subsystem and circuit card designs utilizing the latest FPGA technologies from major vendors like Xilinx, Intel (Altera), and Microsemi (Actel). Your work will support high-speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing, and processor interfaces. Expertise in digital signal processing, modeling and simulation, and circuit-level design and test are desired.

Requirements

Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline
Minimum 5 years (or MS and 3+ years, or a PhD) of FPGA/ASIC design experience for Level 3
Minimum 8 years (or MS and 6+ years, or PhD +3 years) of FPGA/ASIC design experience for Level 4
In-depth knowledge of VHDL and/or Verilog
Proficiency in High level synthesis (Xilinx Vivado HLS AND/OR Mentor Catapult HLS) with C++
Expertise achieving timing closure on dense FPGA designs
Working knowledge of DSP structures and techniques
Proficient in Python, C or other scripting languages
Extensive experience generating test benches
Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis
Experience with FPGA simulation tools to verify performance of complex RTL blocks
Experience with Xilinx or Intel/Altera FPGA architectures and design tools
Soft skills to include: Adaptive, creative, collaborative, comfortable working independently, enjoys solving difficult problems while communicating with all levels of an organization internally and externally
Must be a US Citizen with ability to obtain and maintain Top Secret security clearance with SCI

Nice To Haves

Current or Active Top Secret with SCI/SAP security clearance
Extensive experience implementing Digital Signal or Image Processing algorithms on FPGAs
Extensive experience with high-speed interfaces: Ex. AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet, etc.
Working knowledge of SDR platforms and architectures
Extensive experience developing FPGA algorithms for SoC based architectures
Experience developing FPGA/SW interfaces and controls
Experience developing and prototyping in MATLAB/Simulink
Experience debugging down to the hardware level & experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools.
Experience and knowledge developing requirements for FPGA-based products
Experience with Electronic Design Automation (EDA) Tools: Mentor Graphics ModelSim/QuestaSim, Synplify, Xilinx ISE/ Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder.
Experience working with or developing test benches using SystemVerilog and Universal Verification Methodology (UVM)
Familiarity with revision control, documentation, planning, and review systems similar to GIT/SVN/ClearCase, DOORS, Jira/Rally/ClearQuest

Responsibilities

Research, requirements analysis and systems architecture
Design, coding, test bench design, verification, synthesis and place & route for digital signal processing products
Work with digital subsystem and circuit card designs utilizing the latest FPGA technologies
Support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces
Implementing Digital Signal or Image Processing algorithms on FPGAs
Developing FPGA algorithms for SoC based architectures
Developing FPGA/SW interfaces and controls
Developing and prototyping in MATLAB/Simulink
Debugging down to the hardware level
Developing requirements for FPGA-based products
Developing test benches using SystemVerilog and Universal Verification Methodology (UVM)