FE Engineer

Apple•Cupertino, CA

7d•$150,400 - $225,300•Onsite

About The Position

Design and develop hardware for Apple’s mobile devices. Evaluate new ideas and features for the Central Processing Unit (CPU) hardware. Define the Micro-architecture of the CPU hardware. Develop the CPU hardware using a Hardware-Description-Language. Perform functional debug and closure of the design. Responsible for timing and power closure of the design for the target Frequency and Power. Prepare documentation of the Design Specification. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

Requirements

Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.
Utilizing System Verilog or Verilog to write RTL for high-speed communication IPs
RTL design utilizing System Verilog or Verilog with complex FSMs, and power saving features
Scripting language (Python, Perl, or TCL), including automating the RTL integration flow, process verification, synthesis and timing reports, and building hardware models
Computer architecture and logic design of industry standard interfaces
Digital logic design principles and computer architecture concepts including cache coherence and hardware-software interactions
Constrained random verification process, functional coverage, code coverage, assertion methodology and philosophy
Placement, clock tree synthesis, routing or physical verification using tools from Cadence or Synopsys.
Debugging complex hardware, including identifying RTL bugs from Verilog code, analyzing simulation failures and fixing issues related to timing or power.
Understanding of device physics in sub-micron nodes to address issues for leakage power, signal integrity and process variations.
Handling complex data path logic (MUX trees, adder, comb logic) to meeting timing, performance, area and power goals.

Responsibilities

Design and develop hardware for Apple’s mobile devices.
Evaluate new ideas and features for the Central Processing Unit (CPU) hardware.
Define the Micro-architecture of the CPU hardware.
Develop the CPU hardware using a Hardware-Description-Language.
Perform functional debug and closure of the design.
Responsible for timing and power closure of the design for the target Frequency and Power.
Prepare documentation of the Design Specification.