Etch Engineer - Process Owner

Samsung Electronics • Taylor, TX

4d • $102,230 - $122,230 • Onsite

About The Position

Samsung Austin Semiconductor is hiring an Etch Engineer - Process Owner to develop, optimize, qualify, and sustain plasma etch processes for advanced and mature semiconductor technologies. The role supports FEOL and BEOL processes for emerging Gate-All-Around (GAA) architectures, including 2 nm, and mature nodes including 14 nm, 17 nm, and 28 nm FinFET. It also supports manufacturing for automotive electronics, memory devices, RF technologies, and advanced display applications.

The position involves process control, yield analysis, tool qualification and matching, technology transfer, failure analysis, and factory ramp support. The engineer will work with cross-functional manufacturing teams to improve process stability, throughput, yield, and operational efficiency. The role is full-time and on-site at Samsung Austin Semiconductor. The current base salary range is $102,230 to $122,230; total compensation includes a benefits package and may include incentive compensation.

Requirements

• Bachelor’s degree in Chemical Engineering, Materials Science Engineering, Electrical Engineering, Semiconductor Engineering, or a closely related engineering discipline.
• At least 24 months of experience in the job offered or in a semiconductor plasma etch process engineering role within an advanced-node semiconductor manufacturing environment.
• At least 24 months of experience developing and sustaining BEOL and FEOL dry plasma etch processes.
• At least 24 months of experience with FinFET and/or GAA process technologies, including Nanosheet 3D transistor technology and Copper to Copper Hybrid Bonding.
• At least 24 months of experience with SPC, FDC, APC, and statistical yield analysis methodologies for detecting, correcting, and optimizing semiconductor manufacturing processes.
• At least 24 months of experience authoring critical SOPs for novel etch processes.
• At least 24 months of experience with new product introduction, including etch recipe and tool-spread optimization and implementation of novel APC processes such as Feed Forward APC.
• At least 24 months of experience with semiconductor tool qualification and process matching to establish matching process baselines and hardware-to-hardware reproducibility.
• At least 24 months of experience conducting root-cause analysis for yield excursions and defect reduction.
• At least 24 months of experience optimizing semiconductor processes using DOE methodologies.
• At least 24 months of experience with semiconductor metrology and characterization, including SEM and EDX analysis.
• At least 24 months of experience using statistical analytics software such as Spotfire, JMP, Minitab, or Python for wafer yield optimization, complex process optimization, and equipment-failure detection.
• At least 24 months of experience supporting high-volume manufacturing and factory ramp activities.

Responsibilities

• Develop and optimize FEOL and BEOL plasma etch processes for GAA architectures, including 2 nm, and mature nodes including 14 nm, 17 nm, and 28 nm FinFET.
• Implement and sustain Advanced Process Control methodologies, including feed-forward strategies for trench etch and via-height optimization.
• Monitor SPC/FDC, conduct statistical yield analysis, and investigate root causes of plasma etch process excursions, interlocks, and OCAP events.
• Qualify and integrate heterogeneous etch tool platforms, including LAM Research FLEX/KIYO and/or TEL, Applied Materials, Mattson, PSK, and SEMES equipment.
• Conduct process matching and technology transfer across global semiconductor manufacturing sites.
• Support factory ramp-up through tool qualification planning, capacity optimization, and throughput improvement initiatives.
• Develop monitoring plans for post-preventive-maintenance defect detection and production wafer qualification.
• Collaborate with equipment engineering, process integration, metrology, and yield enhancement teams to improve process stability and manufacturing efficiency.
• Use DOE and statistical analytics platforms, including Spotfire, JMP, Minitab, and Python, for process optimization and defect reduction.
• Perform failure analysis and material characterization using SEM, EDX, spectroscopy, and related semiconductor characterization techniques.
• Support semiconductor manufacturing for automotive electronics, memory devices, RF technologies, and advanced display applications.
• Participate in cost-reduction and risk-assessment initiatives involving process hardware qualification and fab operational efficiency improvements.
• Author critical standard operating procedures for novel etch processes.
• Facilitate new product introduction by optimizing etch recipes and tool spread and implementing novel APC processes such as Feed Forward APC.
• Support high-volume manufacturing and factory ramp activities to transition semiconductor designs into commercially viable, mass-produced products.

Benefits

• Medical insurance
• Dental insurance
• Vision insurance
• Life insurance
• 401(k) matching with immediate vesting
• Onsite cafés
• Onsite workout facilities
• Paid maternity leave
• Paid paternity leave
• Paid time off
• Two personal holidays and ten regular holidays
• Wellness incentives
• Eligible full-time employees may receive MBO bonuses based on company, division, and individual performance

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level