About The Position

The R&D DRAM Device and Cell Technology Group at Micron is working at the heart of future memory scaling in an industry-leading 300mm R&D facility. We explore new device concepts, push the limits of DRAM cell performance, and turn deep physics understanding into manufacturable technology. This team delivers for those who enjoy learning fast, solving hard problems, and collaborating across process areas. In this role, you will play a critical part in defining and validating future DRAM device and cell technologies. As a Device Engineer, you will characterize memory arrays, analyze electrical behavior and failures, and influence process and material decisions that directly impact yield, quality, and performance. Your work will shape the electrical foundation of next-generation DRAM products.

Requirements

  • MS with 5+ years of industry experience or PhD with hands‑on research in Electrical Engineering, Physics, or related field
  • Strong expertise in semiconductor device physics including CMOS, diodes, and related devices
  • Deep knowledge of mainstream memory technologies such as DRAM, NAND, NOR, or SRAM
  • Experience with DRAM array characterization and failure analysis
  • Proficiency in data analysis, DOE, Agentic AI, and statistical techniques using tools such as JMP or Python

Nice To Haves

  • Strong written and verbal communication skills
  • Experience working across process integration and circuit or architecture domains
  • Demonstrated ability to collaborate with multi‑functional engineering teams
  • Proven problem‑solving skills and ability to communicate technical status to management

Responsibilities

  • Define and drive electrical specifications for DRAM, Advanced DRAM and emerging memory technologies, translating product requirements into device-level targets for performance, reliability and scaling
  • Design, implement, and interpret experiments to optimize cell and access device performance. This includes running materials experiment, developing new integration schemes and defining new characterization methodologies
  • Develop physical and electrical models (TCAD and compact modeling) to identify performance, yield and reliability limiters, using advanced materials characterization, device physics insight, and statistical data analysis
  • Create and or improve stress methodologies to evaluate device reliability (e.g., TDDB, leakage, variability, endurance) and establish robust design margins.
  • Analyze array-level behavior using probe, parametric, and backend data to root-cause variability, optimize distributions, and improve yield, quality, and cost
  • Collaborate cross-functionally with process integration, design, and product engineering teams to translate device insights into technology and product improvements, enabling best-in-class memory solutions

Benefits

  • Choice of medical, dental and vision plans
  • Benefit programs that help protect your income if you are unable to work due to illness or injury
  • Paid family leave
  • Robust paid time-off program
  • Paid holidays
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