eCad Electrical Engineer - Level 5 - Dulles
About The Position
Northrop Grumman’s Space Sector is seeking an eCad Electrical Engineer specializing in PCB layout design for its Dulles, Virginia team. The position is 100% onsite and does not accommodate telecommuting. The engineer will focus exclusively on board-level layout—not schematic design—and implement high-reliability, multilayer circuit boards for spaceflight hardware. The role works closely with electrical and mechanical engineers and applies aerospace standards and best practices to meet electrical, mechanical, thermal, and manufacturing needs. The schedule is 9/80, with every other Friday off. Travel is 10% of the time. Relocation assistance may be available. The position owns the end-to-end PCB layout process using Cadence Allegro PCB Designer. It involves multilayer HDI and controlled-impedance layouts, high-speed and RF/mixed-signal routing, library management, stackup development, fabrication and assembly documentation, design reviews, and collaboration with manufacturing partners. The engineer will apply relevant NASA and IPC standards, support DFM/DFX reviews, and drive layout quality through peer reviews, checklist adherence, and continuous optimization. The posting lists the role as Level 5 in the title, while the description refers to Level 3 or Level 4. The supplied Level 5 qualifications require a bachelor’s degree and 12 years of professional PCB layout experience, a master’s degree and 10 years, or a Ph.D. and 8 years. U.S. citizenship is required; no security clearance is required to start.
Requirements
- Bachelor’s degree with 12 years of professional PCB layout experience, or a master’s degree with 10 years of professional experience, or a Ph.D. with 8 years of professional experience.
- Proven experience with Cadence Allegro PCB Designer in an aerospace, medical, or other high-reliability environment.
- Experience creating and managing ECAD libraries, including symbols and footprints.
- Demonstrated expertise in multilayer board layout with signal integrity and power integrity in mind.
- U.S. citizenship.
- Demonstrated leadership in layout design for flight boards or mission-critical systems.
- Experience with IPC CID or CID+ certification, or equivalent layout training.
Nice To Haves
- IPC CID or CID+ certification.
- Experience with NASA-STD-8739.x, IPC-6012, and ECSS standards.
- Experience with RF layout best practices, such as maintaining return-path integrity, shielding, and connector placement.
- Familiarity with designing for radiation environments and space qualification processes.
- Proficiency with constraint-driven design, stackup development, and controlled-impedance routing.
- Experience coordinating thermal and mechanical analysis for layout decisions.
- Prior experience designing layouts for space-rated programs, including DoD, NASA, or commercial LEO/GEO missions.
Responsibilities
- Own the end-to-end PCB layout process using Cadence Allegro PCB Designer.
- Develop multilayer, high-density interconnect and controlled-impedance layouts optimized for space environments.
- Create and maintain PCB symbols, footprints, and padstacks in accordance with internal library standards.
- Coordinate with electrical and mechanical engineers to ensure layouts meet electrical, mechanical, and thermal constraints.
- Implement high-speed routing techniques, including differential pairs, length tuning, and EMI/EMC compliance practices.
- Support RF and mixed-signal layout requirements, including controlled-impedance and matched-length RF traces, isolation and grounding strategies, minimizing parasitic effects and signal loss, and placement and routing of RF-path connectors, antennas, or filters.
- Incorporate blind and buried vias, microvias, and stackup design for rigid/flex and complex assemblies.
- Generate fabrication and assembly files, including Gerber and ODB++, prepare release documentation, and participate in design reviews.
- Apply NASA-STD-8739 and IPC-2221/2222 layout standards for space-rated hardware.
- Participate in DFM/DFX reviews with manufacturing partners to ensure layout readiness for fabrication and assembly.
- Collaborate with engineers to define layout constraints, clearance rules, and placement strategies.
- Drive quality through internal peer reviews, ECAD checklist adherence, and continuous layout optimization.
- Perform other duties as assigned.
Benefits
- Health insurance coverage
- Life insurance
- Disability insurance
- Savings plan
- Company-paid holidays
- Paid time off (PTO) for vacation and/or personal business
- Potential eligibility for overtime, shift differential, and a discretionary bonus, depending on the position
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What This Job Offers
Job Type
Full-time
Career Level
Senior
