Director, System Level Testing - Product Development Engineering

NVIDIA•Santa Clara, CA

9d•$272,000 - $425,500

About The Position

NVIDIA is seeking a Director of System Level Testing to lead end-to-end post-silicon validation, test architecture, and manufacturing ramp for AI, data center, SOC, and Tegra Automotive product lines. The role leads a team responsible for taking next-generation GPU, SOC, LPU, Auto, and Tegra technologies from design validation through manufacturing ramp and high-volume production. The Director collaborates across design, the Silicon Co-design Group, test engineering, reliability, and manufacturing to improve yield and optimize testing. Responsibilities span product development strategy, mixed-signal silicon validation methodologies, product characterization, silicon debug, manufacturing efficiency, and scalable data analysis and automation. The role also supports product qualification, ramp readiness, and high-volume manufacturing scaling. The expected base salary range is USD 272,000–425,500. The role is also eligible for equity and benefits. Applications will be accepted at least until November 3, 2026.

Requirements

Master’s or Ph.D. in Electrical Engineering, Physics, Computer Engineering, or a related field, or equivalent experience.
15+ years of experience in semiconductor product development, testing, or manufacturing engineering, including significant leadership of large, cross-functional technical teams.
5+ years of Director leadership or management experience leading engineering teams.
Strong understanding of CMOS, component characterization, and analog/mixed-signal circuit behavior.
Experience with high-speed testing and characterization.
Proven experience in yield analysis, product characterization, and silicon debug.
Experience using statistical data analysis tools such as JMP for engineering insights and yield improvement.
Ability to drive cross-functional problem solving under aggressive schedules.
Strong leadership, communication, and organizational skills.

Nice To Haves

Experience developing or productizing SOC, GPU, or Automotive products.
Deep expertise in System Level testing, Voltage-Frequency understanding, and manufacturing ramp readiness.
Experience with control loops, feedback systems, and high-speed SerDes/analog front-end validation.
Deep knowledge of advanced CMOS process technologies, multi-chip module (MCM), and high-speed interfaces.
Experience leading product ramps from prototype to high-volume manufacturing.

Responsibilities

Lead and mentor product development engineers responsible for validation, characterization, and production ramp of NVIDIA product lines.
Drive product development strategy from early silicon validation through qualification and high-volume manufacturing.
Develop and implement validation methodologies and test strategies for mixed-signal silicon designs.
Partner with Mixed-Signal Design, Test Engineering, Reliability, and Manufacturing teams to support the transition from design to production.
Oversee product characterization of new integrated circuit designs.
Lead root-cause analysis and resolution of complex issues related to silicon performance, yield excursions, and product reliability.
Drive yield improvement, test time reduction, and manufacturing efficiency across wafer and module test flows.
Provide design teams with structured feedback on silicon performance, design margins, and manufacturability improvements.
Establish scalable data analysis frameworks, automation tools, and statistical methodologies for validation and production monitoring.
Collaborate with operations teams on product qualification, ramp readiness, and high-volume manufacturing scaling.