Director, SI/PI

Netpreme•Santa Clara, CA
•Onsite

About The Position

We are seeking a Director to drive Signal Integrity, Power Integrity of our first generation MPU. It involves all aspects for SI/PI from silicon to system. This role will be performed onsite from one of our offices in Santa Clara, CA or Boston, MA.

Requirements

  • MS or PhD in Electrical Engineering
  • 5+ years of direct industry experience

Nice To Haves

  • Excellent analytical and problem-solving skills with strong attention to detail.
  • Proven ability to independently drive technical decisions and influence engineering direction.
  • Strong communication and cross-functional collaboration skills.
  • Hands-on experience performing lab measurements and correlating hardware results to simulation models.
  • Deep expertise in Signal Integrity with working knowledge of Power Integrity concepts and methodologies.
  • Experience with DDR, LPDDR, or other high-performance memory interfaces.
  • Experience with FPGA, adaptive computing, ASIC, networking, datacenter, or high-performance computing platforms.
  • Experience with PCB, package, and IC-level power delivery networks.
  • Expertise with SI/PI analysis tools including ADS and HFSS; experience with HSPICE is a plus.
  • Strong foundation in electromagnetic theory, transmission lines, and circuit analysis.
  • Experience mentoring engineers and driving technical leadership across organizations.
  • Experience with programming in Python, C++, Matlab.

Responsibilities

  • Responsible for technical solution development for Signal Integrity and Power Integrity.
  • Drive system-level SI/PI architecture, design guidelines, and layout recommendations.
  • Perform end-to-end channel simulations for high-speed serial interfaces and memory subsystems.
  • Lead SI/PI analysis and optimization of DDR5, LPDDR5, LPDDR6, and other high-performance memory interfaces.
  • Correlate simulations with lab measurements and drive root-cause analysis of signal and power integrity issues.
  • Collaborate with silicon, package, PCB, architecture, and manufacturing teams to resolve complex SI/PI challenges.
  • Evaluate future package and PCB technologies to support next-generation FPGA and adaptive computing products

Benefits

  • Competitive salary with performance-based bonus and early-stage equity grant
  • 100% employer-paid Health, Dental, and Vision coverage for you and your dependents
  • 401(k) match with immediate vesting, and access to financial advisors to help you reach your financial goals
  • 100% employer-paid Life, Disability, and AD&D insurance, plus a fitness stipend and wellness & mental health perks
  • Generous PTO: 20 vacation days, 15 company holidays (including 3 floating days of your choosing)
  • Daily lunch stipend
  • Enterprise-level Claude & ChatGPT access with a generous token budget
  • Well-equipped, sunny offices in Santa Clara, CA & Cambridge, MA with on-site parking and EV charging; on-site fitness center in Santa Clara; gym discounts near our Cambridge office
  • Visa sponsorship and relocation assistance to one of our office hubs
  • A collaborative, continuous-learning environment with smart, dedicated colleagues building the next generation of high-performance computing architecture
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