Director - ASIC Engineering (Technical Planning and Engineering Execution)
About The Position
The Director of ASIC Engineering (Technical Planning and Engineering Execution) serves as the operational backbone and Chief of Staff for the ASIC Physical Design (PD) and CAD engineering organization within Cisco’s Silicon One Group. The role partners with engineering leaders, technical leads, and multifunctional executives to align operational execution, resource investments, foundry relationships, and team culture. The position leads operational governance and planning, including business reviews, program and tape-out tracking, silicon health metrics, headcount and budget planning, EDA licensing, and resource allocation across chip tape-outs and technology exploration. It translates technical updates, risks, and project status into executive-level communications and coordinates across engineering, Product Management, Supply Chain and Foundry Operations, Software/Firmware, HR, external IP vendors, and commercial foundries. The role also advances organizational excellence through hiring and workforce planning, skill-gap and retention efforts, internal communications and engineering events, and high-priority initiatives such as evaluating site expansions or new engineering methodologies.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical subject area, or equivalent practical work experience.
- 14+ years of professional experience in the semiconductor industry, with understanding of the end-to-end ASIC/SoC development lifecycle from architecture and RTL design through Physical Design, DFT, emulation, and tape-out.
- Experience in one or more of Technical Program Management, Engineering Management, Business Operations, or a Chief of Staff role in a hardware or semiconductor engineering environment.
- Experience managing engineering operational budgets, headcount allocations, or EDA tool licensing portfolios.
Nice To Haves
- MBA, or a Master’s/Ph.D. degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field.
- Strong financial acumen and a track record managing multi-million-dollar operational budgets, EDA vendor contract negotiations, and complex multi-project resource models.
- Direct experience managing operational relationships, tape-out work, and commercial engagements with semiconductor foundries such as TSMC, Samsung, or IFS, and third-party IP vendors.
- Ability to translate granular technical data, such as timing closure bottlenecks and yield metrics, into strategic executive business summaries.
- Ability to balance organizational strategy with tactical problem solving to unblock operational bottlenecks.
- High emotional intelligence and ability to influence without authority across matrixed global organizations, build trust with engineers and executives, and handle sensitive business, financial, and personnel information with discretion and integrity.
Responsibilities
- Drive weekly, monthly, and quarterly business reviews for the ASIC PD and CAD organization, tracking program achievements, tape-out schedules, and silicon health metrics.
- Lead annual and long-range headcount, operating budget, and EDA tool licensing planning with Finance and Procurement.
- Analyze and optimize resource allocation across concurrent chip tape-outs, advanced process nodes, and next-generation technology exploration teams.
- Synthesize technical updates, timing closure bottlenecks, tape-out risks, and project statuses into actionable presentations for executive leadership and board-level consumption.
- Serve as the primary operational contact between ASIC engineering and Product Management, Supply Chain/Foundry Operations, Software/Firmware teams, and HR.
- Partner with engineering leads on operational relationships, delivery schedules, and landmark commitments with external IP vendors and commercial foundries.
- Collaborate with engineering managers and HR on strategic hiring plans, technical skill-gap assessments, retention strategies, and workforce globalization initiatives.
- Design and implement internal communications, All-Hands meetings, and technical engineering summits.
- Lead high-priority, ambiguous initiatives on behalf of the engineering head, including evaluating geographic site expansions and next-generation methodology adoption.
Benefits
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) plan with Cisco matching contribution
- Paid parental leave
- Short- and long-term disability coverage
- Basic life insurance
- Cisco restricted stock unit grants may be available, subject to eligibility and vesting conditions
- Paid holidays and a floating holiday for non-exempt employees
- Employee birthday day off
- Paid year-end holiday shutdown
- Personal wellness days
- Flexible vacation time off program for exempt employees
- Paid vacation time for non-exempt employees
- Sick time off
- Additional paid time away may be requested for critical or emergency family issues
- Optional paid volunteer days
- Annual bonuses for non-sales roles, subject to Cisco policies
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What This Job Offers
Job Type
Full-time
Career Level
Director
