About The Position

Texas Instruments' Precision ADC team is seeking a Design Verification Engineer to help verify cutting-edge signal chain solutions utilizing delta-sigma ADCs. You will work alongside world-class analog and mixed-signal designers developing some of the highest-precision data converters in the industry. This is a hands-on role with real ownership, where your verification work directly contributes to products trusted in medical, industrial, automotive and instrumentation applications worldwide. In this position, you will develop SystemVerilog/UVM testbenches to verify the digital logic, calibration algorithms, and mixed-signal interfaces of Signal chains involving high-resolution delta-sigma ADCs.

Requirements

  • Bachelor's degree in Electrical Engineering or Computer Engineering
  • 2+ years of relevant experience in digital design or verification
  • Familiarity with SystemVerilog and hardware simulation
  • Understanding of digital logic design fundamentals
  • Ability to solve problems using a systematic approach

Nice To Haves

  • Exposure to or desire to develop expertise in UVM-based testbench
  • Experience with constrained-random testing, functional coverage, and SVA
  • Familiarity with EDA simulation tools (VCS, Xcelium, or Questa) and waveform debug
  • Understanding of analog/mixed-signal concepts such as ADC architectures, noise, and sampling
  • Familiarity with scripting languages such as Python or Perl for test automation
  • Demonstrated strong analytical and problem-solving skills
  • Strong verbal and written communication skills
  • Ability to work in teams and collaborate effectively with people in different functions
  • Strong time management skills that enable on-time project delivery
  • Ability to take the initiative and drive for results
  • Ability to quickly ramp on new systems and processes

Responsibilities

  • Building constrained-random stimulus environments
  • Writing functional coverage models and assertions
  • Running regression campaigns
  • Triaging simulation failures in close collaboration with the RTL and analog design teams
  • Participating in design and verification reviews
  • Presenting findings
  • Growing expertise in mixed-signal verification methodology
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