Digital Design RTL Engineer

Broadcom • Fort Collins, CO

1d • $121,900 - $195,000

About The Position

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical execution, you will collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule.

Requirements

• High proficiency in SystemVerilog
• Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below)
• Deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques.
• BSEE required
• 8+ years of industry experience with a focus on SoC integration, LPDDR5/6, DDR4/5 and/or high-speed SerDes, or HBM protocols is highly preferred.

Nice To Haves

• MSEE/PHD preferred

Responsibilities

• Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off
• Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule

Benefits

• Discretionary annual bonus
• Competitive new hire equity grant
• Annual equity awards
• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays
• Paid sick leave
• Vacation time
• Paid Family Leave
• Other leaves of absence

What This Job Offers

• Job Type: Full-time
• Career Level: Senior