Digital Design Engineer (IC Design)

Semron•Dresden, Sachsen

About The Position

Build the digital part of SEMRON’s future chip generations, including its AI accelerator. Design, verify, and optimize digital designs to meet performance targets, contribute to system architecture exploration, and work closely with the analog and software teams to exchange requirements and implement them. Conduct power, performance, and timing analysis, and develop timing constraints. SEMRON develops AI hardware based on analog in-memory computing for deep neural network acceleration. Its compute architectures scale into the third dimension, enabling high-density deployment of models with billions of parameters on chip areas as small as a few square millimeters.

Requirements

  • In-depth knowledge of RTL design.
  • Experience with RTL simulation tools.
  • A good understanding of digital design trade-offs.
  • Basic knowledge of scripting, such as Tcl or Python, and systems programming, such as C or C++.
  • Familiarity with low-power design techniques.

Nice To Haves

  • Experience with the Chisel HDL.
  • Experience in verification.
  • Experience in mixed-signal simulation.
  • Experience with RISC-V.

Responsibilities

  • Design the digital part of SEMRON’s AI accelerator.
  • Contribute to system architecture exploration efforts.
  • Work closely with analog and software teams to exchange requirements and implement them.
  • Conduct power, performance, and timing analysis.
  • Develop timing constraints.
  • Design, verify, and optimize digital designs to meet performance targets.
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