DFT Architect

Advanced Micro Devices, Inc•San Jose, CA

38d•Onsite

About The Position

As a DFT Architect, you will drive DFT architecture definitions of Scan, MBIST, PHY, high-speed/high-density IOs, communication controllers, and FPGA logics of future AMD products. The role involves working with design architecture, design DFT/DFX, design block owners, and physical design teams with ATE manufacturing environment, silicon debug, product quality, and test cost perspectives. The DFT architect is expected to apply past technical knowledge, learn new cutting-edge technologies, and collaborate with teams to arrive at the best manufacturable solution. The DFT architect will ensure that DFT implementation is completed according to architecture design specifications. This is the role of overseeing early architecture design definition to successful silicon high-volume production.

Requirements

Candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management.
Strong DFT and leadership skills.
Successful DFT architects interact with many external teams and must confidently represent his/her organization.
Significant DFT engineering experience through DFT pre and post silicon cycles
Experience in creating and implementing complex chip-level DFT architecture
Experience in DFT implementation including Scan and Scan Compression at IP and SoC level
Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression.
Strong MBIST knowledge
Experience in PHY, high-speed IO, digital communication and functional test development
Good understanding of Verilog, synthesis, physical implementation and STA
Good understanding of verification methodology
Experience with post-silicon debug and bench equipment (e.g., oscilloscope and logic analyser)
Good communication skills and works well in a group environment that spans across continents
MS or Ph.D. in Electrical/Electronic/Computer Engineering

Nice To Haves

Knowledge of Tessent Streaming Scan Network SSN and hand-on experience is a big plus
Knowledge of FPGA logic, synthesis and design flow is a plus
Knowledge of embedded design and firmware methodology is a plus

Responsibilities

Promote ATE & production test environment, test cost and test quality enhancements in future AMD products through DFT architecture definitions and specifications
Manage DFT activities across architecture, design implementation, verification, and test implementation for new products.
The role is in AMD global quality and operation organization driving best manufacturing test solution through early product definition and pre & post silicon activities
Work closely with design teams and make sure DFT structures are correctly implemented.
Drive internal DFT teams to correctly implement and create test solutions
Drive firmware driven test solutions
Plan for diagnosability and yield improvement