Design for Test (DFT) Engineer

Draper•Cambridge, MA

19h•Onsite

About The Position

Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation. We are seeking an experienced DFT Engineer to join our team. The successful candidate will be responsible for developing and implementing testability solutions for complex digital ASICs, SoCs and SOTA processors. The DFT Engineer will work closely with cross-functional teams, including design, verification, and test engineering to ensure that our products are designed with testability in mind, and that test-related issues are addressed throughout the product development cycle. Key responsibilities will include DFT Architecture and Implementation, Testability Analysis, DFT Methodology Development, DFT Verification, and Test Pattern Generation.

Requirements

Proficiency in integrated circuit design
Understanding of integrated circuits, semiconductors, and general computer architecture
Ability to write detailed design specifications
Ability to manage small technical teams
Excellent verbal and written communication skills
Excellent mathematical skills
Excellent organizational skills and attention to detail
Excellent time management skills with the proven ability to meet deadlines
Strong analytical and problem-solving skills
Ability to prioritize tasks
Demonstrate strong organization, planning, and time management skills to achieve program goals
Requires a bachelor's degree in Engineering, or related field.
5-7 years of experience with a bachelor's degree, or 3-5 years of experience with a master's degree, or 0-2 years of experience with a PhD in ASIC Hardware Engineering or related.

Nice To Haves

Masters degree preferred.

Responsibilities

Design and simulate circuits at transistor-level to implement architecture and requirement specifications
Contribute to system-level design
Optimize hardware designs for performance, power, and cost
Evaluate the hardware feasibility of complex algorithms and requirements
Independently contribute to complex chip architectures and designs
Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements
Contribute to business development and proposal activities
Develop, document, and teach best practices to less experienced engineers
Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics.
Perform other duties as assigned