The SSG Central Applications Engineering team seeks an experienced SoC design engineer to enable the integration and deployment of Cadence IP in complex customer system designs. As a senior technical leader, the Design Engineering Architect enables successful integration and adoption of Cadence interface IP in customer SoCs. The role works closely with SSG IP sales, marketing, development engineering, and customer support teams. It contributes to product definition, creates technical content and examples, and leads complex pre-sales and post-sales engagements. Cadence’s Silicon Solutions Group develops and licenses IP for SoC and ASIC designs, including DSPs, CPUs, interface IP, DDR controllers, hardware accelerators, and subsystems. The role supports customer adoption of Cadence IP and addresses complex system integration challenges. The position is based in San Jose and may require travel up to 10% of the time, including internationally.
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Job Type
Full-time
Career Level
Senior