Defect Metrology Process Engineer - Sr. Staff

SkyWater Technology Foundry, Inc.•Kissimmee, FL

1d•$114,320 - $171,480•Onsite

About The Position

We are looking for a Defect Metrology Process Engineer for our Florida Advanced Packaging site. In this role, you will lead, develop, and improve AOI and Metrology processes for integrated Advanced Packaging process flows and Heterogenous Integration (HI) platform technologies such as Hybrid Bonding and Direct Bond Interconnect (DBI), 2.5D and 3D Interposer, and Fan-Out Wafer Level Packaging (FOWLP). Excellent oral and written communication skills are required to communicate ideas with foundry customers, colleagues, and management.

Requirements

BS, MS or PhD in Electrical Engineering, Electronics Engineering, or a related BS Engineering, MS/PhD preferred
Fab processing tools knowledge/experience and how to support defect feedback to process owners.
8+ years’ experience with BS, 5-8 years of experience with MS, 3+ years of experience with PhD in Electrical Engineering, Electronics Engineering, or a related in the semiconductor industry.
Prior Defect inspection experience.
MEMS/CMOS/Packaging inspection and metrology knowledge with relevant combination of years of experience and/or advanced degree.
Knowledge of DOE, SPC, and 6-sigma concepts and applications.
Clear problem-solving capability, data driven, inventive solution oriented and can articulate thought processes.
Can work both independently and in cross-functional teams for problem solving.
US Citizenship Required: This position will require the holding of or ability to obtain government security clearance which requires U.S Citizenship.

Nice To Haves

Project Management skills and/or defined training a plus.

Responsibilities

Coordinate the integration of our metrology systems into our site MES and automation systems.
Implement and maintain metrology support systems, such as add-on software packages and data collection archiving.
Ensure metrology supports multiple fab areas with thickness and defect measurements, inspection of pillar heights and location, as well as AFM and profilometry.
Daily review of defects and SPC data for excursions, disposition and drive yield improvements in layout and process.
Coordinate with appropriate engineering areas to report die pad locations through automation in fan-out wafer level packaging applications.
Investigate and drive integration changes for improved device performance and yield improvement.
Work with process and tool engineers to find processing marginalities and make improvements.
Performing other duties as assigned.