CPU SRAM Design Engineer

Qualcomm • Austin, TX

2d • $179,000 - $268,400

About The Position

Qualcomm is a company of inventors seeking to revolutionize the CPU market in an age of new possibilities. Are you interested in joining Qualcomm’s high performance CPU team as a Memory Designer? You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. As a CPU SRAM Design Engineer, you will design, improve, and analyze digital circuits for memories. The role involves full ownership of custom SRAM and RF designs from schematic capture to analysis and model generation.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
• PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
• Designing SRAM circuits
• Industry standard custom design tools and flows
• Circuit simulation and monte carlo analysis
• Static timing analysis

Nice To Haves

• MS degree in Electrical Engineering; 10+ years of practical experience
• Strong knowledge of SRAM and Register File techniques with advanced custom circuit implementations
• Strong knowledge of high-performance and low-power design features and techniques
• Strong knowledge of semiconductor device fundamentals
• Familiar with variation-aware simulation in FinFet and Nanosheet technology nodes
• Custom memory layout designs
• All memory analysis steps including design entry, functional verification, layout guidance, simulation, timing, power and electrical characterization
• Good understanding of physical implementation impact on circuit performance
• Proficiency with the following tools: NanoTime, Ansys EMIR analysis, ESP-CV, Liberate power analysis
• Memory logical models (Verilog) and functional verification
• BIST and other DFT features
• Memory analysis flow development and planning

Responsibilities

• Develop custom digital circuits for high-speed and low-power SRAM designs
• Schematic capture
• Layout planning and supervision
• Functional verification
• Simulation and margin verification
• Timing characterization
• Performing analysis steps necessary to generate all deliverable collateral models
• Interacting with CAD team to ensure proper and efficient model generation
• Interacting with Physical Design team resolve memory PPA challenges
• Depending on skill set, aid the team with contributions to modeling, DFT and/or analysis flow development.

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior